USBN9603 National Semiconductor, USBN9603 Datasheet - Page 20

• Manufacturer Part Number: USBN9603
• Description: USBN9603 Universal Serial Bus Full Speed Function Controller with Enhanced DMA Support
• Manufacturer: National Semiconductor

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5.0 MICROWIRE/PLUS Interface
5.2 READ AND WRITE TIMING
Data is read by shifting in the 2-bit command (CMD and the 6-bit address, RADDR or WADDR) while simultaneously shifting
out read data from the previous address.
Data can be written in standard or burst mode. Standard mode requires two bytes: one byte for the command and address
to be shifted in, and one byte for data to be shifted in. In burst mode, the command and address are transferred first, and
then consecutive data is written to that address. Burst mode is terminated when CS becomes inactive (high).
See Figure 15 for basic read timing, Figure 16 for standard write timing, and Figure 17 for write timing in burst mode.
CS
SK
SI
SO
CS
SK
SI
SO
CMD = 0x ADDR
CMD = 10 ADDR
Undefined Data
Undefined Data
8 Cycles
Figure 15. Basic Read Timing
8 Cycles
Figure 16. Standard Write Timing
(Continued)
CMD = 0x ADDR
Write Data
20
Read Data
Read Data
8 Cycles
8 Cycles
New Command
New Command
Read Data
Read Data
8 Cycles
8 Cycles