USBN9603 National Semiconductor, USBN9603 Datasheet - Page 29

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USBN9603

Manufacturer Part Number
USBN9603
Description
USBN9603 Universal Serial Bus Full Speed Function Controller with Enhanced DMA Support
Manufacturer
National Semiconductor
Datasheet

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6.0 Functional Description
The USBN9603 exits Halt mode in response to one of the following wake-up events:
When a valid wake-up event is detected, the device returns to active mode after a power-up delay of 2
elapsed. This delay is established by a 14-bit delay counter, which ensures that the 24 MHz oscillator has reached a stable
condition and the clock doubler locks and generates a stable 48 MHz signal. After this start-up delay, the clock signal can
be output on the CLKOUT pin.
A high-to-low transition is detected on the CS pin and the associated wake-up enable bit, ENUC in the WKUP regis-
ter, is set to 1.
Any activity on the USB is detected (USB not idle) and the associated wake-up enable bit, ENUSB in the WKUP reg-
ister is set to 1. (The node can detect any USB activity only when it is attached.)
Power-On Reset
External RESET
Wake-Up
Event
Halt
(Continued)
Figure 24. Power Saving Modes
Halt On Suspend
or Force Halt
Power-Up
Delay
29
2
14
Power-Up Delay
Timeout
cycles
Active
14
clock cycles has
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