AD9389 Analog Devices, AD9389 Datasheet - Page 7

• Manufacturer Part Number: AD9389
• Description: 800 MHz High Performance HDMI/DVI Transmitter
• Manufacturer: Analog Devices

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Pin Type
POWER SUPPLY
CONTROL
NO CONNECT
Table 5. Pin Function Descriptions
Pin Mnemonic
OUTPUTS
SERIAL PORT (2-WIRE)
INPUTS
TxC+
TxC−
Tx2+
Tx2−
Tx1+
Tx1−
Tx0+
Tx0−
INT
SDA
SCL
DDSDA
DDCSCL
D[23:0]
CLK
DE
HSYNC
VSYNC
EXT_SW
HPD
S/PDIF
MCLK
I
I
LRCLK
PD/A0
2
2
S[3:0]
S CLK
40
Pin No.
31, 30
24, 29, 36, 41
1, 61, 62, 63, 64
16, 19, 20, 21
15, 17, 18, 22,
26, 32, 39, 42,
43, 59, 60, 79,
80
47
46
45
44
48, 49
Description
Differential Clock Output at Pixel Clock Rate; Transition Minimized Differential Signaling (TMDS).
Differential Clock Output Complement.
Differential Output of the Red Data at 10× the Pixel Clock Rate; TMDS.
Differential Red Output Complement.
Differential Output of the Green Data at 10× the Pixel Clock Rate; TMDS.
Differential Green Output Complement.
Differential Output of the Blue Data at 10× the Pixel Clock Rate; TMDS.
Differential Blue Output Complement.
Interrupt.
Serial Port Data I/O.
Serial Port Data Clock.
Serial Port Data I/O Master to Receiver.
Serial Port Data Clock Master to Receiver.
For a full, functional description of the 2-wire serial register, refer to the 2-Wire Serial Control Port section.
Digital Input in RGB or YCbCr Format.
Video Clock Input.
Data Enable for Video Data.
Horizontal Sync Input.
Vertical Sync Input. This is the input for vertical sync.
Place an 887 Ω resistor (1% tolerance) between this pin and ground.
Hot Plug Detect. This indicates to the interface whether the receiver is connected.
S/PDIF Audio Input. This is the audio input from a Sony/Philips Digital Interface.
Audio Reference Clock. Can be set from 128 × f
I
I
Left/Right Channel Selection.
Power Down.
2
2
S Audio Inputs. These represent the eight channels of audio (two per input) available through I
S Audio Clock.
Mnemonic
Tx0+
Tx0−
INT
AV
DV
PV
GND
SDA
SCL
DDSDA
DDCSCL
NC
DD
DD
DD
Description
Differential Output Channel 0
Differential Output Channel 0 Complement
Interrupt
Output Power Supply
Digital and I/O Power Supply
PLL Power Supply
Ground
Serial Port Data I/O
Serial Port Data Clock (100 kHz Maximum)
Serial Port Data I/O to Receiver
Serial Port Data Clock to Receiver
No Connect.
Rev. 0 | Page 7 of 48
S
to 512 × f
S
.
2
S.
Value
TMDS
1.8 V CMOS
1.8 V
1.8 V
1.8 V
0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
AD9389