AD9510 Analog Devices, AD9510 Datasheet - Page 36
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AD9510
Manufacturer Part Number
AD9510
Description
Manufacturer
Analog Devices
Datasheet
1.AD9510.pdf
(41 pages)
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Reg.
Addr.
(Hex)
48
(4A)
(4C)
(4E)
(50)
(52)
(54)
(56)
49
(4B)
(4D)
(4F)
(51)
(53)
(55)
(57)
49
(4B)
(4D)
(4F)
(51)
(53)
(55)
(57)
49
(4B)
(4D)
(4F)
(51)
(53)
(55)
(57)
49
(4B)
(4D)
(4F)
(51)
(53)
(55)
(57)
AD9510
Bit(s)
<7:4>
<3:0>
<4>
<5>
<6>
Name
Divider Low
OUT0
(OUT1)
(OUT2)
(OUT3)
(OUT4)
(OUT5)
(OUT6)
(OUT7)
Phase Offset
OUT0
(OUT1)
(OUT2)
(OUT3)
(OUT4)
(OUT5)
(OUT6)
(OUT7)
Start
OUT0
(OUT1)
(OUT2)
(OUT3)
(OUT4)
(OUT5)
(OUT6)
(OUT7)
Force
OUT0
(OUT1)
(OUT2)
(OUT3)
(OUT4)
(OUT5)
(OUT6)
(OUT7)
Nosync
OUT0
(OUT1)
(OUT2)
(OUT3)
(OUT4)
(OUT5)
(OUT6)
(OUT7)
Description
Number of clock cycles divider output stays low.
Phase offset (default = 0000).
Selects start high or start low.
(Default = 0).
Forces individual outputs to the state specified in start (above).
This function requires that Nosync (below) also be set.
(Default = 0).
Ignore chip-level sync signal (default = 0).
Rev. PrA | Page 36 of 41
Preliminary Technical Data