AD9923 Analog Devices, AD9923 Datasheet - Page 15
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AD9923
Manufacturer Part Number
AD9923
Description
Manufacturer
Analog Devices
Datasheet
1.AD9923.pdf
(64 pages)
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Power Management
The AD9880 uses the activity detect circuits, the active interface
bits in the serial bus, the active interface override bits, the
power-down bit, and the power-down pin to determine the
correct power state. There are four power states: full-power,
seek mode, auto power-down and power-down.
Table 7 summarizes how the AD9880 determines which power
mode to be in and which circuitry is powered on/off in each of
these modes. The power-down command has priority and then
Table 7. Power-Down Mode Descriptions
Mode
Full Power
Seek Mode
Seek Mode
Power-Down
1
2
3
Table 8. Recommended VCO Range and Charge Pump Current Settings for Standard Display Formats
Standard
VGA
SVGA
XGA
SXGA
TV
1
Power-down is controlled via Bit 0 in Serial Bus Register 0x26.
Sync detect is determined by OR’ing Bits 7 to 2 in Serial Bus Register 0x15.
Auto power-down is controlled via Bit 7 in Serial Bus Register 0x27
These are preliminary recommendations for the analog PLL and are subject to change without notice.
Resolution
640 × 480
800 × 600
1024 × 768
1280 × 1024
1280 × 1024
480i
480p
720p
1035i
1080i
1080p
Power-Down
1
1
1
0
1
Refresh Rate
60 Hz
72 Hz
75 Hz
85 Hz
56 Hz
60 Hz
72 Hz
75 Hz
85 Hz
60 Hz
70 Hz
75 Hz
80 Hz
85 Hz
60 Hz
75 Hz
60 Hz
60 Hz
60 Hz
60 Hz
60 Hz
60 Hz
Sync Detect
X
1
0
0
Inputs
2
Horizontal Frequency
31.5 kHz
37.7 kHz
37.5 kHz
43.3 kHz
35.1 kHz
37.9 kHz
48.1 kHz
46.9 kHz
53.7 kHz
48.4 kHz
56.5 kHz
60.0 kHz
64.0 kHz
68.3 kHz
64.0 kHz
80.0 kHz
15.75 kHz
31.47 kHz
45 kHz
33.75 kHz
33.75 kHz
67.5 KHz
Auto PD Enable
X
0
1
Rev. 0 | Page 15 of 64
the automatic circuitry. The power-down pin (Pin 81—polarity
set by Register 0x26[3]) can drive the chip into four power-
down options. Bits 2 and 1 of Register 0x26 control these four
options. Bit 0 controls whether the chip is powered down or the
outputs are placed in high impedance mode (with the exception
of SOG). Bits 7 to 4 of Register 0x26 control whether the
outputs, SOG, Sony Philips digital interface (SPDIF ) or I2S (IIS
or Inter IC sound bus) outputs are in high impedance mode or
not. See the 2-Wire Serial Control Register Detail section for
the details.
3
Power-On or Comments
Everything
Everything
Serial bus, sync activity detect, SOG, band gap
reference
Serial bus, sync activity detect, SOG, band gap
reference
Pixel Rate
25.175 MHz
31.500 MHz
31.500 MHz
36.000 MHz
36.000 MHz
40.000 MHz
50.000 MHz
49.500 MHz
56.250 MHz
65.000 MHz
75.000 MHz
78.750 MHz
85.500 MHz
94.500 MHz
108.000 MHz
135.000 MHz
13.51 MHz
27 MHz
74.25 MHz
74.25 MHz
74.25 MHz
148.5 MHz
VCO Range
00
01
01
01
01
01
01
01
01
10
10
10
10
10
10
11
00
00
10
10
10
11
1
Current
101
011
100
100
100
101
110
110
110
011
100
100
101
110
110
110
010
101
100
100
100
110
AD9880