MAX11043 Maxim Integrated Products, MAX11043 Datasheet - Page 25

• Manufacturer Part Number: MAX11043
• Description: Simultaneous Sampling ADCs
• Manufacturer: Maxim Integrated Products

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Write allowed only if flash busy bit is zero.
This is a 16-bit register that contains the data for a flash
write operation. Default = 0.
This is a read-only register. Data is valid only if flash
busy is zero.
This is a 16-bit register that contains the data for a flash
read operation.
The flash memory consists of 2048 words by 16 bits.
The 3 MSBs of the flash address select one of eight
pages of 256 words each. Page zero contains the
default filter coefficients for channels A and B. Page
one contains the default filter coefficients for channels
C and D. Use pages two and three for the coefficients
of custom filters. When the first word on page two con-
tains a nonzero value, the MAX11043 loads these
pages into C-RAM at power-up instead of the default
values from pages zero and one. Flash pages zero and
one include trim data. Unique trim data optimizes the
performance of each MAX11043. To maintain optimum
performance when using custom filters, copy the trim
data from flash pages zero and one to the correspond-
ing locations in flash pages two and three or to C-RAM
when writing directly to C-RAM.
Table 2. Stage One Filter Selection
Table 3. C-RAM and Flash Memory Map
EQ filter stage 1 (C-RAM address 03h–05h)
LP filter for ADC gain of 1, 2, and 4; stage 1 (C-RAM address 1Dh–1Fh)
LP filter for ADC gain of 8; stage 1 (C-RAM address 3Dh–3Fh)
LP filter for ADC gain of 16; stage 1 (C-RAM address 23h–25h)
ADDRESS
C-RAM
00h
01h
02h
03h
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
ADDRESS
Flash and C-RAM Register Map
FLASH
01h*
06h*
07h*
00h
02h
03h
04h
05h
______________________________________________________________________________________
FILTER FIRST STAGE
Flash Data Out Register (1Bh)
Flash Data In Register (1Ah)
EQ gain trim for gain = 1
User trim for EQ gain, default = 2000h
Not used
EQ filter coefficient A2 for filter stage 1
MSB FOR C-RAM
—
—
—
—
Further optimization of the MAX11043 is achieved
through stage one filter coefficients for each channel.
When using custom filters, copy stage one coefficients
from pages zero and one to the corresponding loca-
tions in flash pages two and three or to C-RAM when
writing directly to C-RAM. Table 2 identifies the default
stage one filters (EQ and LP) for the MAX11043. For
custom filters, use stages two through seven first, and
only change the stage one coefficients when all seven
stages require customization.
The flash addresses below are for channel A; for chan-
nel B add 80h, for channel C add 100h, and for channel
D add 180h. To write to pages two and three of flash,
add 200h to the above values.
To load the coefficients directly to C-RAM, create a 32-
bit data word by concatenating the data in adjacent
flash locations as shown in Table 3. The C-RAM
addresses below are for channel A; for channel B add
40h, for channel C add 80h, and for channel D add
C0h.
Multiple addresses exist for some stage 1 filter coeffi-
cients as shown in Table 3. The address accessed by
the filter depends on the configuration bits as shown in
Table 2.
Not used
Not used
Not used
EQ filter gain for filter stage 1
EQ
X
1
0
0
PGAPD
LSB FOR C-RAM
0
1
0
0
—
—
—
—
MODG
XX
XX
00
XX
PGAG
X
X
0
1
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