MAX1359B Maxim Integrated Products, MAX1359B Datasheet - Page 38
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MAX1359B
Manufacturer Part Number
MAX1359B
Description
Data-Acquisition System
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX1359B.pdf
(67 pages)
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DataSheet.in
DACA_OP Register
Writing to the DACA_OP output register updates DACA
on the rising SCLK edge of the LSB data bit. The output
voltage can be calculated as follows:
16-Bit, Data-Acquisition System with ADC, DAC,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
GAIN CAL Register (Power-On State: 1000 0000 0000 0000 0000 0000)
GAIN<23:0>: Gain-calibration bits. The data format is
unsigned binary with 23 bits to the right of the decimal
point and scales the ADC output before being written to
the DATA register. The gain calibration allows full-scale
errors between -V
in unipolar mode, and full-scale errors between (+50%
x V
mode. The MAX1359B can perform system gain cali-
bration or self gain calibration. Self-calibration performs
DACA_OP Register (Power-On State: 000X XX00 0000 0000)
DAE: DACA enable bit. Set DAE = 1 to power up the
DACA and the DACA output buffer in the MAX1359B.
OP2E: OP2 power-enable bit. Set OP2E = 1 to power
up OP2.
38
REF
GAIN23
GAIN15
DACA7
GAIN7
______________________________________________________________________________________
MSB
MSB
DAE
) and (+200% x V
V
OUTA
REF
GAIN22
GAIN14
DACA6
GAIN6
OP2E
/ 2 and +V
= V
REF
REF
) in unipolar or bipolar
x N / 2
REF
GAIN21
GAIN13
DACA5
GAIN5
OP1E
/ 2 to be corrected
10
GAIN20
GAIN12
DACA4
GAIN4
X
where
V
N is the integer value of DACA<9:0> output register.
The output buffer is in unity gain.
The DACA data is 10 bits long and right justified.
a calibration for offsets in the ADC and system calibra-
tion performs a calibration for the entire signal path.
See the ADC Calibration section for more details.
The ADC input voltage range specifications must always
be obeyed and the GAIN CAL register effectively scales
the ADC digital output to a full-scale value determined
by the calibration. The usable gain-calibration range is
limited to less than the full GAIN CAL register digital-
scaling range by the internal noise of the ADC.
OP1E: OP1 power-enable bit. Set OP1E = 1 to power
up OP1.
DACA<9:0>: DACA data bits.
REF
GAIN19
GAIN11
DACA3
GAIN3
X
is the reference voltage for the DAC.
GAIN18
GAIN10
DACA2
GAIN2
X
GAIN17
DACA9
DACA1
GAIN9
GAIN1
GAIN16
DACA8
DACA0
GAIN8
GAIN0
LSB
LSB