MAX1400 Maxim, MAX1400 Datasheet - Page 19

• Manufacturer Part Number: MAX1400
• Description: %V / 18-Bit / Low-Power / Multichannel / Oversampling Sigma-Delta ADC
• Manufacturer: Maxim

The data register is a 24-bit, read-only register. Any
attempt to write data to this location will have no effect.
If a write operation is attempted, 8 bits of data must be
clocked into the part before it will return to its normal
idle mode, expecting a write to the communications
register.
Data is output MSB first, followed by three reserved 0
bits and a 3-bit channel ID tag indicating the channel
from which the data originated.
Table 10. Transfer-Function Register Mapping—Gain-Cal Mode (M1 = 1, M0 = 0)
X = Don’t care
Data Register (Read-Only) Bits
First Bit (Data MSB)
SCAN
D17
D9
D1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
DATA BITS
(Data LSB)
______________________________________________________________________________________
D16
D8
D0
DIFF
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
+5V, 18-Bit, Low-Power, Multichannel,
Data Register (Read-Only)
D15
D7
‘0’
Oversampling (Sigma-Delta) ADC
A1
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
0
0
1
1
1
RESERVED BITS
D14
D6
‘0’
DATA BITS
DATA BITS
A0
0
1
0
1
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
1
D17–D0: The conversion result. D17 is the MSB. The
result is in offset binary format. 00 0000 0000 0000
0000 represents the minimum value and 11 1111 1111
1111 1111 represents the maximum value. Inputs
exceeding the available input range are limited to the
corresponding minimum or maximum output values.
0: These reserved bits will always be 0.
CID2–0: Channel ID tag (Table 11).
D13
D5
‘0’
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALGAIN+–CALGAIN-
CALOFF+–CALOFF-
CALOFF+–CALOFF-
CHANNEL
AIN1–AIN6
AIN2–AIN6
AIN3–AIN6
AIN4–AIN6
AIN5–AIN6
AIN1–AIN2
AIN3–AIN4
AIN5–AIN6
CID2
D12
D4
CHANNEL ID TAG
Do not use
Do not use
CID1
D11
D3
FUNCTION REG.
TRANSFER
1
1
2
2
1
2
3
1
1
2
2
3
3
3
1
2
3
3
3
CID0
D10
D2
(LSB)
19