XR18W750 ON Semiconductor, XR18W750 Datasheet - Page 10

• Manufacturer Part Number: XR18W750
• Manufacturer: ON Semiconductor

XR18W750
WIRELESS UART CONTROLLER
In the parallel mode, the CPU interface is 8 data bits wide with 3 address lines and control signals to execute
data bus read and write transactions. The XR18W750 data interface supports both the Intel and Motorola
compatible types of CPUs and is compatible to the industry standard 16C550 UART. Each bus cycle is
asynchronous using CS#, IOR# and IOW#, or CS# and R/W# inputs. A typical data bus interconnection for
Intel and Motorola mode is shown in
F
3.2
IGURE
4. XR18W750 T
Parallel Mode (CPU) Interface
UART_IRQ#
UART_CS#
UART_CS#
UART_INT
RXRDY#
TXRDY#
RESET#
RXRDY#
TXRDY#
D7:D0
A2:A0
RESET
R/W#
D7:D0
GND
GND
A2:A0
VCC
IOW#
IOR#
GND
VCC
YPICAL
VCC
I
NTEL
Figure
/M
OTOROLA
A2:A0
D7:D0
CS#
IOW#
IOR#
RESET
INT
TXRDY#
RXRDY#
S/P#
16/68#
A2:A0
D7:D0
CS#
IOW#
IOR#
RESET
INT
TXRDY#
RXRDY#
16/68#
S/P#
4.
UART
UART
D
Motorola Data Bus Interconnections
ATA
Intel Data Bus Interconnections
10
B
US
RTS#
CTS#
RTS#
CTS#
RX
TX
RX
I
TX
NTERCONNECTIONS
A2:A0
D7:D0
CS#
IOW#
IOR#
INT
RX
TX
CTS#
RTS#
Microprocessor
UART
A2:A0
D7:D0
CS#
IOW#
IOR#
INT
RX
TX
CTS#
RTS#
Microprocessor
UART
(P
8051
ARALLEL
8051
M
ODE
)
REV. 1.0.0