ATA25 White Electronic Designs Corporation, ATA25 Datasheet - Page 12

• Manufacturer Part Number: ATA25
• Description: Density = 32MB-1GB ;; Memory Device = Hitachi Flash ;; Organization = X16/x8 ;; Speed (ns) = 250 ;; Volt = 3/5
• Manufacturer: White Electronic Designs Corporation

June 2000 Rev. 1 – ECO #12936
Configuration Register Specifications
This card supports four Configuration registers for the purpose of the configuration and observation of this
card.
1. Configuration Option Register (Address 200H)
This register is used for the configuration of the card configuration status and for the issuing the soft reset
to the card.
bit7
SRESET
Note: initial value: 00H
Name
SRESET
(HOST->)
LevlREQ
(HOST->)
INDEX
(HOST->)
INDEX bit assignment
INDEX bit
5 4 3 2 1 0 Card mode
0 0 0 0 0 0 Memory card
0 0 0 0 0 1 I/O card
0 0 0 0 1 0 I/O card
0 0 0 0 1 1 I/O card
7PxxxATA25xxC25
bit6
LevlREQ
R/W
R/W
R/W
R/W
Function
Setting this bit to "1", places the card in the reset state (Card Hard Reset). This
operation is equal to Hard Reset, except this bit is not cleared. Then this bit is set to "0",
places the card in the reset state of Hard Reset (This bit is set to "0" by Hard Reset) .
Card configuration status is reset and the card internal initialized operation starts when
Card Hard Reset is executed, so the next access to the card should be the same
sequence as the power on sequence.
This bit sets to "0" when pulse mode interrupt is selected, and "1" when level mode
interrupt is selected.
This bit is used to select the operation mode of the card as follows.
When Power on, Card Hard Reset and Soft Reset, this data is "000000" for the purpose
of Memory card interface recognition.
bit5
INDEX
0H to FH, 400H to 7FFH
Task File register address
xx0H to xxFH
1F0H to 1F7H, 3F6H to 3F7H
170H to 177H, 376H to 377H
bit4
12
bit3
White Electronic Designs Corporation [phone]
bit2
Mapping mode
memory mapped
contiguous I/O mapped
primary I/O mapped
secondary I/O mapped
bit1
bit0