TEA6324 Philips Semiconductors (Acquired by NXP), TEA6324 Datasheet - Page 5

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TEA6324

Manufacturer Part Number
TEA6324
Description
TEA6324T; Sound Control Circuit
Manufacturer
Philips Semiconductors (Acquired by NXP)
Datasheet

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Philips Semiconductors
FUNCTIONAL DESCRIPTION
The source selector selects one of 2 stereo inputs or the
mono input. The maximum input signal voltage is
V
inputs of the following volume control parts are available at
pins 7 and 8 for the left channel and pins 17 and 18 for the
right channel. This offers the possibility of interfacing a
noise reduction system.
The volume control function is split into two sections:
volume I control block and volume II control block.
The control range of volume I is between +20 dB and
between 0 dB and 55 dB in steps of 1 dB.
The recommended control range to be used is 86 dB
(+20 to 66 dB) although in theory, a range of 106 dB
(+20 to 86 dB) can be attained. The gain/attenuation
setting of the volume I control block is common for both
channels.
The volume I control block is followed by the bass control
block. The frequency response of the bass control (see
Fig.3) is provided for each channel by an external filter in
combination with internal resistors. The adjustable range
is between 18 and +18 dB in steps of 1.8 dB at 46 Hz.
The treble control block offers a control range between
characteristic is determined by a single capacitor of 5.6 nF
for each channel in combination with internal resistors
(see Fig.4).
The basic step width of treble control is 3 dB.
The intermediate steps are obtained by switching 1.5 dB
boost and 1.5 dB attenuation steps.
The bass and treble control functions can be switched off
via I
disconnected. The connections B2L and B2R are outputs
and TL and TR are inputs for inserting an external
equalizer.
The last section of the circuit is the volume II block.
The balance function uses the same control block. This is
achieved by 2 independently controllable attenuators, one
for each output. The control range of these attenuators is
55 dB in steps of 1 dB with an additional mute step.
The circuit provides 3 mute modes:
1. Zero crossing mode mute via I
2. Fast mute via MUTE pin (see Fig.9)
1997 Mar 13
31 dB in steps of 1 dB. The volume II control range is
12 and +12 dB in steps of 1.5 dB at 15 kHz. The filter
i(rms)
Sound control circuit
2 independent zero crossing detectors (ZCM,
see Tables 2 and 8 and Fig.15)
2
C-bus. In this event the internal signal flow is
= 2 V. The outputs of the source selector and the
2
C-bus using
5
3. Fast mute via I
The mute function is performed immediately if ZCM is
cleared (ZCM = 0). If the bit is set (ZCM = 1) the mute is
activated after changing the GMU bit. The actual mute
switching is delayed until the next zero crossing of the
audio frequency signal. Two comparators are built-in to
provide independent mute switches to control each of the
audio channels (left and right).
To avoid a large delay of mute switching when very low
frequencies are processed, the maximum delay time is
limited to typically 100 ms by an integrated timing circuit
and an external capacitor (C
timing circuit is triggered by reception of a new data word
for the switch function which includes the GMU bit. After a
discharge and charge period of an external capacitor the
muting switch follows the GMU bit, only if no zero crossing
was detected during that time.
The mute function can also be controlled externally (see
Fig.9). If the mute pin is switched to ground all outputs are
muted immediately (hardware mute). This mute request
overwrites all mute controls via the I
pin is held LOW. The hardware mute position is not stored
in the TEA6324T.
Typically, the turn on/off can be used to avoid AF output.
This can be caused by the input signal from preceding
stages, which may produce output during a drop of V
To avoid this, the mute must be set prior to a V
can be achieved either by I
the MUTE pin.
In cases where there is no mute in the application before
turn off, a supply voltage drop of more than 1
result in a mute during the voltage drop.
The power supply should include a V
which provides a discharging time constant. If the input
signal does not disappear after turn off the input will
become audible after a certain time. A 4.7 k resistor
discharges the V
current of the IC does not discharge it completely.
The hardware mute function is ideal for use in Radio Data
System (RDS) applications. The zero crossing mute
avoids modulation plops. This feature is an advantage for
mute during changing presets and/or sources (e.g. traffic
announcement during cassette playback).
see Tables 2 and 8) or volume II block setting
(see Table 4).
CC
2
C-bus either by general mute (GMU,
buffer capacitor, because the internal
2
C-bus control, or by grounding
m
= 10 nF, see Fig.9). This
Preliminary specification
2
C-bus for the time the
CC
TEA6324T
buffer capacitor,
CC
V
drop and
BE
will
CC
.

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