MAX3748 Maxim, MAX3748 Datasheet - Page 8

• Manufacturer Part Number: MAX3748
• Description: Compact 155Mbps to 3.2Gbps Limiting Amplifier
• Manufacturer: Maxim

When AC-coupling is desired, coupling capacitors C
and C
deterministic jitter. Jitter is decreased as the input low-
frequency cutoff (f
For ATM/SONET or other applications using scrambled
NRZ data, select (C
f
other applications using 8B/10B data coding, select
(C
Refer to Application Note HFAN-1.1: Choosing AC-
Coupling Capacitors.
The capacitor between CAZ1 and CAZ2 determines the
time constant of the signal path DC offset cancellation
loop. To maintain stability, it is important to keep a one-
decade separation between f
cutoff (f
circuit. For ATM/SONET or other applications using
scrambled NRZ data, f
Therefore, C
or Gigabit Ethernet applications, leave pins CAZ1 and
CAZ2 open.
The SFF-8472 Digital Diagnostic specification requires
monitoring of input receive power. The MAX3748/
MAX3748A and MAX3744 receiver chipset allows for
the monitoring of the average receive power by mea-
suring the average DC current of the photodiode.
Compact 155Mbps to 3.2Gbps
Limiting Amplifier
Figure 5. MAX3748 LOS Output Circuit
8
IN
IN
< 32kHz. For Fibre Channel, Gigabit Ethernet, or
_______________________________________________________________________________________
, C
Select the Offset-Correction Capacitor
OUT
OUT
OC
should be selected to minimize the receiver’s
) associated with the DC offset cancellation
) ≥ 0.01µF, which provides f
AZ
= 0.1µF (f
Select the Coupling Capacitor
f
IN
IN
) is decreased:
= 1 / [2π(50)(C
IN
GND
V
, C
CC
IN
< 32kHz, so f
OC
OUT
RSSI Implementation
= 2kHz). For Fibre Channel
) ≥ 0.1µF, which provides
IN
and the low-frequency
IN
)]
OCMAX
IN
ESD
STRUCTURE
< 320kHz.
< 3.2kHz.
LOS
IN
The MAX3744 preamp measures the average photodi-
ode current and provides the information to the output
common mode. The MAX3748/MAX3748A RSSI detect
block senses the common-mode DC level of input sig-
nals IN+ and IN- and provides a ground-referenced out-
put signal (RSSI) proportional to the photodiode current.
The advantage of this implementation is that it allows the
TIA to be packaged in a low-cost conventional 4-pin TO-
46 header.
The MAX3748/MAX3748A RSSI output is connected to
an analog input channel of the DS1858/DS1859 SFP
controller to convert the analog information into a 16-bit
word. The DS1858/DS1859 provide the receive-power
information to the host board of the optical receiver
through a 2-wire interface. The DS1859 allows for internal
calibration of the receive-power monitor.
The MAX3744 and the MAX3748/MAX3748A have been
optimized to achieve RSSI stability of 2.5dB within the
range of 6µA to 500µA of average input photodiode
current. To achieve the best accuracy, Maxim recom-
mends receive power calibration at the low end (6µA)
and the high end (500µA) of the required range; see
the RSSI Current Gain graph in the Typical Operating
Characteristics.
For best use of the RSSI monitor, capacitor C1 and
resistor R1 shown in the first Typical Application Circuit
need to be placed as close as possible to the Dallas
diagnostic monitor with the ground of C1 and R1 the
same as the DS1858/DS1859 ground. Capacitor C1
suppresses system noise on the RSSI signal. R1 = 3kΩ
and C1 = 0.1µF is recommended.
Figure 6. MAX3748A LOS Output Circuit
Connecting to the DS1858/DS1859
GND
V
CC
ESD
STRUCTURE
LOS