MAX5066 Maxim Integrated Products, MAX5066 Datasheet - Page 11

• Manufacturer Part Number: MAX5066
• Description: Synchronous Buck Controller
• Manufacturer: Maxim Integrated Products

Finally, a thermal-shutdown feature protects the device
during thermal faults and shuts down the MAX5066
when the die temperature exceeds +160°C.
The MAX5066 can operate as a dual-output indepen-
dently regulated buck converter, or as a dual-phase,
single-output buck converter. The MODE input selects
between the two operating modes. When MODE is
grounded (logic low), VEA1 and VEA2 connect to CEA1
and CEA2, respectively (see
operates as a two-output DC-DC converter. When
MODE is connected to REG (logic high), VEA2 is dis-
connected and VEA1 is routed to both CEA1 and CEA2
and the device works as a dual-phase, single-output
buck regulator with each output 180° out of phase with
respect to each other.
The MAX5066 accepts a wide input voltage range at IN
of 5V to 28V. An internal linear regulator steps down V
to 5.1V (typ) and provides power to the MAX5066. The
output of this regulator is available at REG. For V
4.75V to 5.5V, connect IN and REG together externally.
REG can supply up to 65mA for external loads. Bypass
REG to AGND with a 4.7µF ceramic capacitor for high-
frequency noise rejection and stable operation.
REG supplies the current for both the MAX5066’s inter-
nal circuitry and for the MOSFET gate drivers (when
connected externally to V
65mA. Calculate the maximum bias current (I
the MAX5066:
where I
typ), Q
charges of MOSFETs Q1 through Q4 at V
Figure
individual phase.
V
vers. Connect the regulator output REG externally to
V
and a parallel combination of 1µF and 0.1µF ceramic
capacitors to filter out the high peak currents of the
MOSFET drivers from the sensitive internal circuitry.
BST1 and BST2 supply the power for the high-side
MOSFET drivers for output 1 and output 2, respectively.
Connect BST1 and BST2 to V
Configurable, Single-/Dual-Output, Synchronous
DD
DD
I
BIAS
Supply Voltage Connections (V
is the power input for the low-side MOSFET dri-
through an R-C lowpass filter. Use a 1Ω resistor
High-Side MOSFET Drive Supply (BST_)
Dual-Output/Dual-Phase Select (MODE)
Buck Controller for High-Current Applications
Low-Side MOSFET Driver Supply (V
6), and f
IN
GQ1
=
is the quiescent supply current into IN (4mA,
I
IN
, Q
+
f
GQ2
SW
SW
______________________________________________________________________________________
×
, Q
is the switching frequency of each
(
Q
GQ3
GQ
1
DD
, Q
+
Q
Figure
), and can source up to
GQ
GQ4
DD
2
+
are the total gate
1) and the device
Q
through rectifier
GQ
3
GS
+
IN
= 5V (see
Q
BIAS
/V
GQ
REG
4
IN
) for
DD
)
IN
=
)
)
diodes D1 and D2 (see Figure 6). Connect a 0.1µF
ceramic capacitor between BST_ and LX_.
Minimize the trace inductance from BST_ and V
rectifier diodes, D1 and D2, and from BST_ and LX_ to
the boost capacitors, C8 and C9 (see Figure 6). This is
accomplished by using short, wide trace lengths.
The MAX5066 includes an undervoltage lockout
(UVLO) with hysteresis, and a power-on reset circuit for
converter turn-on and monotonic rise of the output volt-
age. The UVLO threshold monitors V
nally set between 4.0V and 4.5V with 200mV of
hysteresis. Hysteresis eliminates “chattering” during
startup. Most of the internal circuitry, including the
oscillator, turns on when V
MAX5066 draws up to 4mA (typ) of current before
V
The compensation network at the current-error ampli-
fiers (CLP1 and CLP2) provides an inherent soft-start of
the output voltage. It includes (R14 and C10) in parallel
with C11 at CLP1 and (R15 and C12) in parallel with
C13 at CLP2 (see
error amplifier output limits the maximum current avail-
able to charge the output capacitors. The capacitor at
CLP_ in conjunction with the finite output-drive current
of the current-error amplifier yields a finite rise time for
the output current and thus the output voltage.
An internal oscillator generates the 180
clock signals required for both PWM modulators. The
oscillator also generates the 2V
essary for the PWM comparators. The oscillator fre-
quency can be set from 200kHz to 2MHz by an external
resistor (R
Figure 6). The equation below shows the relationship
between R
where R
Use RT/CLKIN as a clock input to synchronize the
MAX5066 to an external frequency (f
an external clock to RT/CLKIN allows each PWM section
to work at a frequency equal to f
comparator with a 1.6V threshold detects f
f
internal oscillator clock, to the clock present at
RT/CLKIN.
RT/CLKIN
REG
reaches the UVLO threshold.
Setting the Switching Frequency (f
RT
T
is present, internal logic switches from the
T
is in ohms and f
) connected from RT/CLKIN to AGND (see
and the switching frequency:
Power-On Reset (POR)/Soft-Start
Undervoltage Lockout (UVLO)/
f
Figure
OSC
=
2 5 10
6). The voltage at the current-
.
SW(PER PHASE)
R
×
RT
REG
P-P
10
RT/CLKIN
reaches 4.5V. The
Hz
voltage ramps nec-
RT/CLKIN
REG
o
/2. An internal
= f
out-of-phase
and is inter-
RT/CLKIN
). Applying
OSC
/2.
DD
SW
. If
11
to
)