MAX5083 Maxim Integrated Products, MAX5083 Datasheet - Page 11
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MAX5083
Manufacturer Part Number
MAX5083
Description
1.5A / 40V / MAXPower Step-Down DC-DC Converters
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX5083.pdf
(18 pages)
where V
Three key inductor parameters must be specified for
operation with the MAX5082/MAX5083: inductance
value (L), peak inductor current (I
saturation current (I
tance is a function of operating frequency, input-to-out-
put voltage differential, and the peak-to-peak inductor
current (∆I
value while a lower ∆I
value. A lower inductor value minimizes size and cost
and improves large-signal and transient response, but
reduces efficiency due to higher peak currents and
higher peak-to-peak output voltage ripple for the same
output capacitor. On the other hand, higher inductance
increases efficiency by reducing the ripple current.
Resistive losses due to extra wire turns can exceed the
benefit gained from lower ripple current levels especial-
ly when the inductance is increased without also allow-
ing for larger inductor dimensions. A good compromise
is to choose ∆I
Calculate the inductor using the following equation:
V
mum for typical conditions. The switching frequency
(f
350kHz when synchronized to an external clock (see the
Oscillator/Synchronization Input (SYNC) section). The
peak-to-peak inductor current, which reflects the peak-to-
peak output ripple, is worst at the maximum input voltage.
See the Output Capacitor Selection section to verify that
the worst-case output ripple is acceptable. The inductor
saturating current (I
away current during continuous output short circuit.
Select an inductor with an I
the maximum peak current limit of 3.5A.
The discontinuous input current of the buck converter
causes large input ripple currents and therefore the
input capacitor must be carefully chosen to keep the
input voltage ripple within design requirements. The
input voltage ripple is comprised of ∆V
capacitor discharge) and ∆V
SW
IN
and V
) is fixed at 250kHz or can vary between 150kHz and
FB
OUT
P-P
= 1.23V.
). Higher ∆I
are typical values so that efficiency is opti-
P-P
L
______________________________________________________________________________________
equal to 40% of the full load current.
R
=
SAT
SAT
4
V
V
=
OUT IN
Input Capacitor Selection
IN
). The minimum required induc-
) is also important to avoid run-
P-P
⎡
⎢
⎣
P-P
×
V
V
(
OUT
f
SAT
V
SW
FB
requires a higher inductor
R
ESR
allows for a lower inductor
3
−
×
specification higher than
Inductor Selection
−
V
∆
(caused by the ESR of
OUT
1
⎤
⎥
⎦
I
P - P
PEAK
1.5A, 40V, MAXPower Step-Down
)
Q
), and inductor
(caused by the
the input capacitor). The total voltage ripple is the sum
of ∆V
ESR required for a specified ripple using the following
equations:
where
I
cycle, and f
The MAX5082/MAX5083 includes internal and external
UVLO hysteresis and soft-start to avoid possible unin-
tentional chattering during turn-on. However, use a bulk
capacitor if the input source impedance is high. Use
enough input capacitance at lower input voltages to
avoid possible undershoot below the undervoltage
lockout threshold during transient loading.
The allowable output voltage ripple and the maximum
deviation of the output voltage during load steps deter-
mine the output capacitance and its ESR. The output
ripple is mainly composed of ∆V
capacitor discharge) and ∆V
age drop across the equivalent series resistance of the
output capacitor). The equations for calculating the
peak-to-peak output voltage ripple are:
Normally, a good approximation of the output voltage
ripple is ∆V
capacitors, assume the contribution to the output volt-
age ripple from ESR and the capacitor discharge to be
OUT_MAX
Q
and ∆V
is the maximum output current, D is the duty
SW
∆I
DC-DC Converters
RIPPLE
ESR
C
P - P
ESR
is the switching frequency.
IN
∆
V
=
=
∆
. Calculate the input capacitance and
=
Q
V
(
I
≈ ∆V
V
OUT_MAX
Output Capacitor Selection
ESR
⎛
⎜
⎝
=
IN
I
D
OUT_MAX
V
1
IN
−
=
6
∆
=
ESR
V
V
V
×
OUT
×
V
ESR
Q
OUT
∆
IN
C
f
SW
V
∆
×
OUT
+ ∆V
ESR
ESR
×
I
)
f
P-P
SW
×
+
D
×
×
(
∆
∆
1
V
www.DataSheet4U.com
×
(caused by the volt-
OUT
I
I
L
Q
−
P - P
2
P - P
Q
f
. If using ceramic
D
SW
)
(caused by the
⎞
⎟
⎠
and
11