MAX5083 Maxim Integrated Products, MAX5083 Datasheet - Page 8
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MAX5083
Manufacturer Part Number
MAX5083
Description
1.5A / 40V / MAXPower Step-Down DC-DC Converters
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX5083.pdf
(18 pages)
1.5A, 40V, MAXPower Step-Down
DC-DC Converters
Figure 1. MAX5082 Simplified Block Diagram
REG is the output terminal of a 5V (MAX5082), or 8V
(MAX5083) LDO which is powered from IN and pro-
vides power to the IC. Connect REG externally to
DVREG to provide power for the high-side MOSFET
gate driver. Bypass REG to SGND with a ceramic
capacitor of at least 1µF. Place the capacitor physically
close to the MAX5082/MAX5083 to provide good
bypassing. During normal operation, REG is intended
for powering up only the internal circuitry and should
not be used to supply power to external loads.
The MAX5082/MAX5083 provides two undervoltage
lockouts (UVLOs). An internal UVLO looks at the input
voltage (V
(MAX5083). An external UVLO is sensed and pro-
8
COMP
SYNC
REG
_______________________________________________________________________________________
SS
FB
I
SS
IN
) and is fixed at 4.1V (MAX5082) or 7.1V
OSC
Internal Linear Regulator (REG)
IN
1.23V
EN
Internal UVLO/External UVLO
LDO
REF
EN
RAMP
IN
E/A
V
REF
1.23V
0.3V
THERMAL
SHDN
CPWM
1.23V
CLK
<1.11V OFF
>1.23V ON
ON/OFF
REGOK
SSA
grammed at the ON/OFF pin. The external UVLO over-
rides the internal UVLO when the external UVLO is
higher than the internal UVLO. During startup, before
any operation begins, the input voltage and the voltage
at ON/OFF must exceed their respective UVLOs. The
external UVLO has a rising threshold of 1.23V with
0.12V of hysteresis. Program the external UVLO by
connecting a resistive divider from IN to ON/OFF to
SGND. Connect ON/OFF to IN directly to disable the
external UVLO.
Driving ON/OFF to ground places the MAX5082/
MAX5083 in shutdown. When in shutdown, the internal
power MOSFET turns off, all internal circuitry shuts
down and the quiescent supply current reduces to
200µA. Connect an RC network from ON/OFF to SGND
to set a turn-on delay that can be used to sequence the
output voltages of multiple devices.
V
REF
PCLK
EN
OVERL
DVREG
CHARGE-PUMP
MANAGEMENT
MANAGEMENT
ILIM
PFM
C-
LOGIC
OVERLOAD
LEVEL
SHIFT
C+
PCLK
SCLK
REF_ILIM
REF_PFM
ILIM
CLK
MAX5082
DVREG
www.DataSheet4U.com
DVREG
HIGH-SIDE
CURRENT
SENSE
SGND
IN
BST
LX
PGND