SS1621B-48SSOP Shenzhen SI Semiconductors Co., LTD., SS1621B-48SSOP Datasheet - Page 10

• Manufacturer Part Number: SS1621B-48SSOP
• Description: RAM Mapping 32 X 4 LCD Controller for I/O uC
• Manufacturer: Shenzhen SI Semiconductors Co., LTD.

timer/WDT setting command, and an operat-
ing command. The data mode, on the other
hand,
READ-MODIFY-WRITE
following are the data mode Ids and the com-
mand mode ID:
before the data or command is transferred. If
successive commands have been issued, the
command mode ID, namely 100 , can be
omitted. While the system is operating in the
non-successive
non-successive address data mode, the CS
pin should be set to “1” and the previous op-
eration mode will be reset also. Once the CS
pin returns to “0” a new operation mode ID
should be issued first.
Interfacing
with the SS1621. The CS line is used to ini-
tialize the serial interface circuit and to ter-
minate the communication between the host
READ
WRITE
READ-MODIFY-WRITE
COMMAND
The mode command should be issued
Only four lines are required to interface
includes
Operation
READ,
command
operations.
Command
WRITE,
Mode
Data
Data
Data
or
1 1 0
1 0 1
1 0 1
1 0 0
ID
The
and
the
controller and the SS1621. If the CS pin is
set to 1, the data and command issued be-
tween the host controller and the SS1621 are
first disabled and then initialized. Before is-
suing a mode command or mode switching, a
high level pulse is required to initialize the
serial interface of the SS1621. The DATA
line is the serial data input/output line. Data to
be read or written or commands to be written
have to be passed through the DATA line.
The RD line is the READ clock input. Data
in the RAM are clocked out on the falling
edge of the RD signal, and the clocked out
data will then appear on the DATA line. It is
recommended that the host controller read in
correct data during the interval between the
rising edge and the next falling edge of the
RD signal. The WR line is the WRITE clock
input. The data, address, and command on the
DATA line are all clocked into the SS1621 on
the rising edge of the WR signal. There is an
optional IRQ line to be used as an interface
between the host controller and the SS1621.
The IRQ pin can be selected as a timer output
or a WDT overflow flag output by the S/W
setting. The host controller can perform the
time base or the WDT function by being con-
nected with the IRQ pin of the SS1621.
p. 10
Last update: 2008-06-03 04:36
SS1621