SS1621B-48SSOP Shenzhen SI Semiconductors Co., LTD., SS1621B-48SSOP Datasheet - Page 7

• Manufacturer Part Number: SS1621B-48SSOP
• Description: RAM Mapping 32 X 4 LCD Controller for I/O uC
• Manufacturer: Shenzhen SI Semiconductors Co., LTD.

Functional Description
Display memory – RAM
ganized into 32x4 bits and stores the dis-
played data. The contents of the RAM are di-
rectly mapped to the contents of the LCD
driver. Data in the RAM can be accessed by
WR, RD
Clock
WR, RD
Clock
CS
The static display memory (RAM) is or-
SEG31
SEG0
SEG1
SEG2
SEG3
90%
50%
10%
COM3
D3
50%
FIRST
Clock
50%
OSCO
t
su1
t
OSCI
COM2
f
D2
t
CLK
(D3, D2, D1, D0)
RAM mapping
Figure 1
Figure 3
Data 4 bits
COM1
D1
LAST
Clock
COM0
t
D0
h1
t
f
t
CLK
External Clock Source
Addr
On-chip RC Oscillator
31
Crystal Oscillator
0
1
2
3
Data
t
CS
32768Hz
256kHz
256kHz
(A5, A4, …, A0)
System oscillator configuration
Address 6 bits
V
GND
V
GND
V
GND
DD
DD
DD
the
READ-MODIFY-WRITE commands. The
following is a mapping from the RAM to the
LCD pattern:
System oscillator
generate the time base/Watchdog Timer
(WDT) clock frequency, LCD driving clock,
and tone frequency. The source of the clock
may be from an on-chip RC oscillator
(256kHz), a crystal oscillator (32.768kHz), or
an external 256kHz clock by the S/W setting.
The configuration of the system oscillator is
as shown. After the SYS DIS command is
executed, the system clock will stop and the
LCD bias generator will turn off. That com-
mand is, however, available only for the
WR, RD
Clock
p. 7
DB
The SS1621 system clock is used to
READ,
1/8
50%
Figure 2
t
SU
VALID DATA
50%
Last update: 2008-06-03 04:36
WRITE,
t
h
System
Clock
SS1621
GND
GND
V
V
DD
DD
and