XR16L570 Exar Corporation, XR16L570 Datasheet - Page 8

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XR16L570

Manufacturer Part Number
XR16L570
Description
SMALLEST 1.62V TO 5.5V UART
Manufacturer
Exar Corporation
Datasheet

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XR16L570
SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
The L570 includes an on-chip oscillator in the 32-QFN package (XTAL1 and XTAL2) to generate a clock when
a crystal is connected between the XTAL1 and XTAL2 pins of the device. Alternatively, an external clock can be
supplied through the XTAL1 or CLK pin. The CPU data bus does not require this clock for bus operation. The
crystal oscillator provides a system clock to the Baud Rate Generators (BRG) section. XTAL1 is the input to the
oscillator or external clock input and XTAL2 pin is the bufferred output which can be used as a clock signal for
other devices in the system. Please note that the XTAL1 input is not 5V tolerant and therefore, the maximum
voltage at that pin should be VCC when an external clock is supplied. For programming details, see
2.9, Programmable Baud Rate Generator” on page
F
The on-chip oscillator is designed to use an industry standard microprocessor crystal (parallel resonant,
fundamental frequency with 10-22 pF capacitance load, ESR of 20-120 ohms and 100ppm frequency
tolerance) connected externally between the XTAL1 and XTAL2 pins (see
chip oscillator can operate with a crystal whose frequency is not greater than 24 MHz. On the other hand, the
L570 can accept an external clock of up to 64MHz at XTAL1 pin, with a 2K ohms pull-up resistor on XTAL2 pin
(as shown in
than 24MHz. This translates to a maximum of 4Mbps serial data rate at 5V.
For further reading on the oscillator circuit please see the Application Note DAN108 on the EXAR web site at
http://www.exar.com.
2.8
IGURE
4. T
Crystal or External Clock Input
YPICAL
Figure
C
5). The 2K ohms pull-up resistor may be required for external clock frequencies of greater
RYSTAL CONNECTIONS
F
IGURE
v c c
g n d
5. E
22-47pF
E x te rn a l C lo c k
XTAL1
C1
XTERNAL
R 1
2 K
500K - 1M
V C C
R2
22-47pF
XTAL2
8
9.
C2
C
Y1
LOCK
1.8432 MHz
(Optional)
24 MHz
X T A L 1
X T A L 2
0-120
R1
to
C
ONNECTION FOR
Figure
E
4). When VCC = 5V, the on-
XTENDED
D
xr
ATA
R
ATE
REV. 1.0.0
“Section

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