AD1981A Analog Devices, AD1981A Datasheet - Page 9

• Manufacturer Part Number: AD1981A
• Description: AD1981A AC'97 Soundmax Codec
• Manufacturer: Analog Devices

ID[9:0] Identify Capability. The ID decodes the capabilities of AD1981A based on the following:
SE[4:0] Stereo Enhancement: The AD1981A does not provide hardware 3D stereo enhancement (all bits are zeros).
This register controls the line_out volume controls for both stereo channels and mute bit. Each volume subregister contains 5 bits,
generating 32 volume levels with 31 steps of 1.5 dB each.
Because AC ‘97 defines 6-bit volume registers, to maintain compatibility whenever the D5 or D13 bits are set to “1,” their respective
lower five volume bits are automatically set to “1” by the Codec logic. On readback, all lower 5 bits will read ones whenever these
bits are set to “1.”
RMV[4:0]
RM
LMV[4:0]
MM
Reg Num Name
Reg Num Name D15 D14 D13 D12 D11 D10 D9
Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h, which forces the serial configuration).
Reading this register returns the ID code of the part and a code for the type of 3D Stereo Enhancement.
For AC ‘97 compatibility, Bit D7 (RM) is only available by setting the MSPLT bit Register 76h. The MSPLT bit enables separate mute bits for the left and right
channels. If MSPLT is not set, RM bit has no effect.
02h
00h
Master Volume MM X
Reset
Right Master Volume Control: The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of –46.5 dB.
Right Channel Mute: Once enabled by the MSPLT Bit in Register 76h, this bit mutes the right channel separately
from the MM bit. Otherwise, this bit will always read “0” and will have no effect when set to “1.”
Left Master Volume Control: The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of –46.5 dB.
Master Volume Mute: When this bit is set to “1,” both L/R channels are muted, unless the MSPLT bit in Register
76h is set to “1,” in which case this mute bit will only affect the left channel.
X
D15 D14 D13 D12
SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 0090h
Bit
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
ID8
ID9
MM
0
0
0
0
1
X LMV4 LMV3 LMV2 LMV1 LMV0 RM
Function
Dedicated Mic PCM In Channel
Modem Line Codec Support
Bass and Treble Control
Simulated Stereo (Mono to Stereo)
Headphone Out Support
Loudness (Bass Boost) Support
18-Bit DAC Resolution
20-Bit DAC Resolution
18-Bit ADC Resolution
20-Bit ADC Resolution
Master Volume Register (Index 02h)
WRITE
00 0000
00 1111
01 1111
1x xxxx
xx xxxx
D11
xMV5…xMV0
D10
Reset (Index 00h)
D9
READBACK
00 0000
00 1111
01 1111
01 1111
xx xxxx
D8
D8
D7
D7 D6 D5
D6
X X RMV4 RMV3 RMV2 RMV1 RMV0 8000h
Function
0 dB Gain
–22.5 dB Gain
–46.5 dB Gain
–46.5 dB Gain
–∞ dB Gain
D5
AD1981A
0
0
0
0
1
0
0
1
0
0
D4
D4
D3
D3
D2
D2
D1
D1
AD1981A
D0 Default
D0
Default