nRF24E2 Nordic VLSI, nRF24E2 Datasheet - Page 51

• Manufacturer Part Number: nRF24E2
• Description: Single Chip RF Transmitter + MCU + ADC NRF2402 2.4GHz RF Transmitter
• Manufacturer: Nordic VLSI

PRODUCT SPECIFICATION
The lower 32 bytes form four banks of eight registers (R0–R7). Two bits on the
program status word (PSW) select which bank is in use. The next sixteen bytes form a
block of bit-addressable memory space at bit addresses 0x00–0x7F. All of the bytes in
the lower 128 bytes are accessible through direct or indirect addressing. The SFRs and
the upper 128 bytes of RAM share the same address range (0x80-0xFF). However, the
actual address space is separate and is differentiated by the type of addressing. Direct
addressing accesses the SFRs, while indirect addressing accesses the upper 128 bytes
of RAM. Most SFRs are reserved for specific functions, as described in 10.6Special
Function Registers on page 59. SFR addresses ending in 0h or 8h are bit-addressable.
The table below shows the layout of the first few bytes of the EEPROM image.
Table 10-1 : EEPROM layout
The contents of the 4 lowest bits in the first byte is used by the boot loader to set the
correct SPI frequency. These fields are encoded as shown below:
SPEED (bit 3): EEPROM max speed
XO_FREQ (bits 2,1 and 0): Crystal oscillator frequency
The program eeprep can be used to add this header to a program file.
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Revision: 1.0
0:
1:
2:
…
…
N:
N+1:
128 special function registers (SFRs) accessible through direct addressing.
0 = 1MHz
1 = 0.5MHz
000 = 4MHz,
001 = 8MHz,
010 = 12MHz,
011 = 16MHz,
100 = 20MHz
Version
(now 00)
Offset to start of user program (N)
Number of 256 byte blocks in user program (includes block 0 that is not
full)
Optional User data, not interpreted by boot loader
…
First byte of user program, goes into ERAM at 0x0000
Second byte of user program, goes into ERAM at 0x0001
…
7
6
Reserved
(now 00)
5
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4
SPEED
3
2
XO_FREQ
1
August 2003
0