AT91SAM9260 ATMEL Corporation, AT91SAM9260 Datasheet - Page 16

• Manufacturer Part Number: AT91SAM9260
• Description: AT91 ARM Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

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6.5
6.6
6.7
7. Processor and Architecture
7.1
16
I/O Line Drive Levels
Shutdown Logic Pins
Slow Clock Selection
ARM926EJ-S Processor
AT91SAM9260 Preliminary
The PIO lines are high-drive current capable. Each of these I/O lines can drive up to 16 mA
permanently.
The SHDN pin is an output only, which is driven by the Shutdown Controller.
The pin WKUP is an input-only. It can accept voltages only between 0V and VDDBU.
The AT91SAM9260 slow clock can be generated either by an external 32,768 Hz crystal or
the on-chip RC oscillator.
Table 6-1 on page 16
Table 6-1.
OSCSEL
0
1
• RISC Processor Based on ARM v5TEJ Architecture with Jazelle technology for Java
• Two Instruction Sets
• DSP Instruction Extensions
• 5-Stage Pipeline Architecture:
• 8-Kbyte Data Cache, 8-Kbyte Instruction Cache
• Write Buffer
acceleration
– ARM High-performance 32-bit Instruction Set
– Thumb High Code Density 16-bit Instruction Set
– Instruction Fetch (F)
– Instruction Decode (D)
– Execute (E)
– Data Memory (M)
– Register Write (W)
– Virtually-addressed 4-way Associative Cache
– Eight words per line
– Write-through and Write-back Operation
– Pseudo-random or Round-robin Replacement
– Main Write Buffer with 16-word Data Buffer and 4-address Buffer
– DCache Write-back Buffer with 8-word Entries and a Single Address Entry
– Software Control Drain
Slow Clock Selection
defines the states for OSCSEL signal.
Slow Clock
Internal RC
External 32,768 Hz
6221DS–ATARM–22-Sep-06