MT57W1MH18J Micron Semiconductor Products, Inc., MT57W1MH18J Datasheet - Page 4

• Manufacturer Part Number: MT57W1MH18J
• Description: 18Mb Ddrii SRAM, 1.8V Vdd, Hstl, 4-Word Burst,
• Manufacturer: Micron Semiconductor Products, Inc.

NOTE:
18Mb: 1.8V V
MT57W1MH18J_H.fm – Rev. H, Pub. 3/03
1. SA0 and SA1 are advanced in linear burst order at each K and K# rising edge.
2. The compare width is n – 2 bits. The compare is performed only if a WRITE is pending and a READ cycle is requested.
3. The functional block diagram illustrates simplified device operation. See truth table, ball descriptions, and timing
4. For 2 Meg x 8, n = 21, a = 8; NWx# = 2 separate nibble writes.
NWx#
BWx#
R/W#
If the address matches, data is routed directly to the device outputs, bypassing the memory array.
diagrams for detailed information.
For 1 Meg x 18, n = 20, a = 18; BWx# = 2 separate byte writes.
For 512K x 36, n = 19, a = 36; BWx# = 4 separate byte writes.
LD#
K#
SA
K
DD
, HSTL, DDRIIb4 SRAM
n
a
a
E
E
E
ADDRESS
REGISTER
REGISTER
ADDRESS
REGISTER
E
E
REGISTER
REGISTER
WRITE
R/W#
INPUT
INPUT
COMPARE
n
(NOTE 2)
a
WRITE#
a
SA0''’
SA0’
SA0#’
SA0’
SA0#’
SA0’
0
1
n
CLK
CLK
a
a
a
Figure 2: Functional Block Diagram
SA1
SA0
2 Meg x 8; 1 Meg x 18; 512K x 36
D1
D0
REGISTER
WRITE
C
BURST
LOGIC
(NOTE 1)
n - 2
n
REGISTER
Q1
Q0
OE
a
a
SA1’
SA0’
DRIVER
WRITE
n
n
a
a
WRITE#
WRITE#
READ
MEMORY
ARRAY
2 n x a
4
SA’
2 MEG
SA0''
a
a
1.8V V
SENSE
AMPS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
C#
C
C
a
a
X
CONTROL
OUTPUT
LOGIC
REGISTER
8, 1 MEG
DD
OUTPUT
, HSTL, DDRIIb4 SRAM
a
a
SA0'''
MUX
2:1
0
1
a
a
X
18, 512K
a
OUTPUT
BUFFER
ZQ
E
©2003 Micron Technology, Inc.
a
2
X
CQ, CQ#
DQ
36