MT92220BG Zarlink Semiconductor, MT92220BG Datasheet - Page 151

• Manufacturer Part Number: MT92220BG
• Description: Description = 1023 Channel Voice Over IP/AAL2 Processor ;; Package Type = Epbga ;; No. Of Pins = 608
• Manufacturer: Zarlink Semiconductor

Data Sheet
The format of the RX HDLC Stream/Buffer Control Table is the following:
RX Circular Buffer
Base and Size
Circular Buffer Write
Pointer
Circular Buffer Read
Pointer
Note
Field
+0h
+2h
+4h
+6h
b 15
RX HDLC Stream/Buffer Control Entry
0FFCh
0FFEh
0000h
0008h
b14
This field indicates the location and the size of the buffer that it used to store packets
prior to sending them on this HDLC stream. Supported size are between 256 bytes
and 64K bytes in step of 2^k.
This pointer is used to remember the position of the next byte to be written in the
circular buffer. It thus points to an invalid byte. The pointer is defined as a pointer to
bytes. This field should be initialized to zero upon buffer creation.
This pointer is used to remember the position of the next byte to be read in the circular
buffer. It thus points to a valid byte. The pointer is defined as a pointer to bytes. When
the read and write pointers are equal, the buffer is deemed empty. This field should be
initialized to zero upon buffer creation.
Packets in the HDLC Circular Buffers have already been zero inserted/byte inserted.
b13
The RX HDLC Stream/Buffer Control Table is at a fixed
address in SSRAM B. It always contains 512 entries.
Figure 85 - RX HDLC Stream/Buffer Control Table
b12
b11
Table 64 - Fields and Description
Circular Buffer Read Pointer [15:0]
Circular Buffer Write Pointer [15:0]
RX Circular Buffer Base [20:8] and Size
b10
Zarlink Semiconductor Inc.
b9
b8
Entry 510
Entry 511
Entry 0
Entry 1
b7
b6
Description
b5
b4
b3
b2
b1
b0
MT92220
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