MT933 Zarlink Semiconductor, MT933 Datasheet - Page 6

• Manufacturer Part Number: MT933
• Description: MT933 - 3.3V 10/100 Fast Ethernet Transceiver to Mii
• Manufacturer: Zarlink Semiconductor

6
MT933
Low-Power Mode
This function is set via the management interface.
Using MDC and MDIO, Bit 11 of register 0 is written
high to put the MT933 into Low-Power mode. The
type of low power mode is dependant on bits 14 and
15 in register 24.
For 24[15:14] = 0:0 the 10BASE-T and 100BASE-TX
transceivers are disabled. The oscillator continues
to run. Both RX_CLK and TX_CLK are stopped, the
RXD bus is held low and TXD, TXEN, and TXER are
ignored. MDC and MDIO are still active for new
commands. This mode is intended to conserve power
when the network connection is not required and the
TXOP/TXON output is undriven. Typical current
consumption is less than 10mA.
For 24[15:14] = 0:1, everything is turned off, including
the voltage references and the oscillator. This mode
must be exited via the management interface. Typical
current consumption is 0.5mA.
For 24[15:14] = 1:0, the only function available is the
signal detect. The MT933 will detect a signal amplitude
on the cable and activate the interrupt. MINT can be
selected as either an active low or high interrupt.
Typical current consumption is less than 10mA.
For 24[15:14] = 1:1, the MT933 will automatically
power down into a sleep mode if no activity is seen
on the cable for approx 2 seconds. Power up is also
automatic if activity is seen. Typical current
consumption is less than 10mA.
Loopback Mode
Diagnostic loopback may be selected at any time by
asserting setting Bit 14 in register 0. In 10BASE-T
mode transmission to the TXOP/ TXON output will
be stopped and the RX10 Clock Recovery will receive
input from the TX10 transmit path rather than from
the RXIP/RXIN inputs. In 100BASE-TX mode
transmission to the TXOP/TXON output will be stopped
and the RX100 Clock Recovery will receive input
from the TX100 transmit path.
Repeater Mode
The MT933 can be put into Repeater Mode by setting
register 24 bit 0 high. In this mode, the CRS will be
active on receive only. In 100Mbps repeater mode,
the MT933 is able to perform a disconnect function
from the MII. This function is enabled by bit 1 in
register 24. (Note that if the device is not in repeater
mode, this bit has no effect). The MT933 will
disconnect from the MII if it receives two
consecutive false CRS events with no good frame in
between them or if a false CRS event is longer then
480 +/- 4BT. If the MT933 receives a good carrier
event (480 +/- 4BT) or a good idle event (idle symbols
for a period of 25000 to 30000 bit time) it will resume
frame transfer to the MII.
A false CRS event happens if, at the beginning of a
carrier event, the JK symbols are not received
correctly.
When the MT933 is in 100M mode it will count all
false CRS events in register 27 bits 7:0. This counter
is self cleared upon read. If a disconnect event
occurs between the consecutive reads of register 27,
bit 15 in the register will set high.
Auto-Negotiation Enable (ANEN)
Auto-negotiation may be hardware disabled by setting
the ANEN pin to logic zero. During operation, auto-
negotiation can be disabled by setting the ANEN pin
low or by setting bit 12 of register 0 to zero. If auto-
neg is disabled, the MT933 will lose the link, and link
will be re-established only after the MT933 control
state machine has determined the speed using bits
13 and 8 of register 0 to determine speed and duplex
respectively.
MII Management Interface, MDC and MDIO
The management interface is a 2 wire serial interface
connecting a PHY to a management entity. The
management unit controls the PHY and gathers
information on the status of the PHY. It does this via
the implemented registers using MDC to clock the
data on the MDIO pin.
Link Status Change Interrupt, MINT
MINT is, by default, an active low interrupt which is
activated whenever a change in the link status occurs.
It can be changed to be active high by setting bit 13
in register 24. The interrupt will remain active until
the controller acknowledges the interrupt by writing
to register 21 (any data). Should one or more link
status changes occur between the assertion of MINT
and an ackowledge, then MINT will be deasserted
and then reasserted (deassertion time between 100ns
and 150ns). Only a single interrupt event may be
queued at any one time. Multiple status changes
between an ackowledge will generate only a single
queued interrupt.