PIC12CE67 Microchip Technology, PIC12CE67 Datasheet - Page 40

• Manufacturer Part Number: PIC12CE67
• Description: 8-Pin/ 8-Bit CMOS Microcontroller with A/D Converter and EEPROM Data Memory
• Manufacturer: Microchip Technology

PIC12CE67X
8.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 8-4. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 8-4. The maximum recommended imped-
ance for analog sources is 10 k . After the analog
input channel is selected (changed) this acquisition
must be done before the conversion can be started.
To calculate the minimum acquisition time, Equation 8-
1 may be used. This equation assumes that 1/2 LSb
error is used (512 steps for the A/D). The 1/2 LSb error
is the maximum error allowed for the A/D to meet its
specified resolution.
EQUATION 8-1:
V
or
Tc = -(51.2 pF)(1 k + R
Example 8-1 shows the calculation of the minimum
required acquisition time T
based on the following system assumptions.
Rs = 10 k
1/2 LSb error
V
Temp (system max.) = 50 C
V
FIGURE 8-4:
DS40181B-page 40
HOLD
DD
HOLD
= 5V
= (V
= 0 @ t = 0
A/D Sampling Requirements
REF
Rss = 7 k
S
- (V
) and the internal sampling switch (R
REF
HOLD
ANALOG INPUT MODEL
Legend C
/512)) • (1 - e
VA
SS
. The sampling switch (R
A/D MINIMUM CHARGING
TIME
+ R
Rs
V
I leakage
R
SS
C
T
PIN
IC
HOLD
S
) ln(1/511)
ACQ
RAx
C
5 pF
HOLD
(-Tc/C
PIN
. This calculation is
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
) must be allowed
HOLD
(R
IC
+ R
V
DD
SS
DD
), see
+ R
V
V
T
T
Preliminary
S
SS
SS
= 0.6V
= 0.6V
))
)
)
)
I leakage
500 nA
EXAMPLE 8-1:
T
T
T
T
R
ACQ
ACQ
C
ACQ
IC
Note 1: The reference voltage (V
Note 2: The charge holding capacitor (C
Note 3: The maximum recommended impedance
Note 4: After a conversion has completed, a
=
1k
= Amplifier Settling Time +
= 5 s + Tc + [(Temp - 25 C)(0.05 s/ C)]
= 5 s + 5.724 s + [(50 C - 25 C)(0.05 s/ C)]
Holding Capacitor Charging Time +
Temperature Coefficient
-C
-51.2 pF (1 k + 7 k + 10 k ) ln(0.0020)
-51.2 pF (18 k ) ln(0.0020)
-0.921 s (-6.2146)
5.724 s
10.724 s + 1.25 s
11.974 s
V
SS R
DD
HOLD
Sampling
Switch
effect on the equation, since it cancels
itself out.
not discharged after each conversion.
for analog sources is 10 k . This is
required to meet the pin leakage specifi-
cation.
2.0 T
acquisition can begin again. During this
time the holding capacitor is not con-
nected to the selected A/D input channel.
6V
5V
4V
3V
2V
SS
(R
AD
IC
CALCULATING THE
MINIMUM REQUIRED
SAMPLE TIME
Sampling Switch
5 6 7 8 9 10 11
+ R
delay must complete before
V
SS
C
= DAC capacitance
= 51.2 pF
( k )
SS
HOLD
1998 Microchip Technology Inc.
+ R
S
) ln(1/512)
REF
) has no
HOLD
) is