SST55LD019A Silicon Storage Technology, Inc., SST55LD019A Datasheet - Page 20

• Manufacturer Part Number: SST55LD019A
• Description: Ata Flash Disk Controllersst's Ata Flash Disk Controller is The Heart of a High Performance, Flash Media-based Data Storage System. The Ata Flash Disk Controller Recognizes The Control, Address, And Data Signals on The Ata/ide Bus And Translates Them
• Manufacturer: Silicon Storage Technology, Inc.

Advance Information
11.1.2.9 Status & Alternate Status Registers (Read Only)
These registers return the ATA Flash Disk Controller status when read by the host. Reading the Status register does
clear a pending interrupt while reading the alternate Status register does not. The meaning of the status bits are
described as follows:
11.1.2.10 Device Control Register (Write Only)
This register is used to control the ATA Flash Disk Controller interrupt request and to issue a software reset. This
register can be written to even if the device is busy. The bits are defined as follows:
©2004 Silicon Storage Technology, Inc.
Symbol
BUSY
RDY
DWF
DSC
DRQ
CORR
ERR
Symbol
SW Rst
-IEn
BUSY
D7
D7
X
RDY
Function
The busy bit is set when the ATA Flash Disk Controller has access to the command
buffer and registers and the host is locked out from accessing the Command register and
buffer. No other bits in this register are valid when this bit is set to a 1.
RDY indicates whether the device is capable of performing ATA Flash Disk Controller
operations. This bit is cleared at power up and remains cleared until the ATA Flash Disk
Controller is ready to accept a command.
This bit, if set, indicates a write fault has occurred.
This bit is set when the ATA Flash Disk Controller is ready.
The Data-Request bit is set when the ATA Flash Disk Controller requires that information
be transferred either to or from the host through the Data register.
This bit is set when a correctable data error has been encountered and the data has
been corrected. This condition does not terminate a multi-sector Read operation.
This bit is set when the previous command has ended in some type of error. The bits in
the Error register contain additional information describing the error. It is recommended
that media access commands (such as Read-Sectors and Write-Sectors) that end with
an error condition should have the address of the first sector in error in the command
block registers.
Function
This bit is set to 1 in order to force the ATA Flash Disk Controller to perform a software
Reset operation. The chip remains in reset until this bit is reset to ‘0.’
0: The Interrupt Enable bit enables interrupts
1: Interrupts from the ATA Flash Disk Controller are disabled
This bit is set to 0 at Power-on and Reset.
D6
D6
X
DWF
D5
D5
X
DSC
D4
D4
SST55LD019A / SST55LD019B / SST55LD019C
X
20
DRQ
D3
D3
1
SW Rst
CORR
D2
D2
ATA Flash Disk Controller
-IEn
D1
D1
0
ERR
D0
D0
0
S71241-02-000
Reset Value
Reset Value
1000 0000b
0000 1000b
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