SST55LD019A Silicon Storage Technology, Inc., SST55LD019A Datasheet - Page 69

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SST55LD019A

Manufacturer Part Number
SST55LD019A
Description
Ata Flash Disk Controllersst's Ata Flash Disk Controller is The Heart of a High Performance, Flash Media-based Data Storage System. The Ata Flash Disk Controller Recognizes The Control, Address, And Data Signals on The Ata/ide Bus And Translates Them
Manufacturer
Silicon Storage Technology, Inc.
Datasheet

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ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C
12.2.4 Media Side Interface I/O Timing Specifications
TABLE 12-10: SST55LD019A/B/C T
Note: All AC specifications are guaranteed by design.
©2004 Silicon Storage Technology, Inc.
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
ALS
ALH
CLS
CLH
CS
CH
CHR
WP
WH
WC
DS
DH
RP
RR
REA
RC
REH
RHZ
FIGURE 12-7: H
CS1FX#/CS3FX#
IORD#/IOWR
Read DQ
Write DQ
Parameter
FCLE Setup Time
FCLE Hold Time
FCE# Setup Time
FCE# Hold Time for Command/Data Write Cycle
FCE# Hold Time for Sequential Read Last Cycle
FWE# Pulse Width
FWE# High Hold Time
Write Cycle Time
FALE Setup Time
FALE Hold Time
FAD[15:0] Setup Time
FAD[15:0] Hold Time
FRE# Pulse Width
Ready to FRE# Low
FRE# Data Setup Access Time
Read Cycle Time
FRE# High Hold Time
FRE# High to Data Hi-Z
DMACK#
DMARQ
15-0
15-0
OST
Note: 1. To terminate the transmission of a data burst, the host should negate DMACK# within the
T
ERMINATES A
2. If the device is able to continue the transfer of data, the device may leave DMARQ asserted
specified time after a IORD# or IOWR# pulse. No further IORD# or IOWR# pulses shall be
asserted for this burst.
and wait for the host to reassert DMACK# or may negate DMARQ at any time after detecting
that DMACK# has been negated.
IMING
M
ULTI
P
ARAMETERS
-
WORD
DMA D
69
T
ATA
K
T
RANSFER
T
0
T
E
T
D
Min
T
30
30
30
30
30
30
60
30
30
25
25
30
30
20
60
30
5
-
G
T
T
N
T
J
F
T
H
Max
Advance Information
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
T
S71241-02-000
Z
1241 F08.0
T12-10.0 1241
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4/04

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