PIC16C62B Microchip Technology, PIC16C62B Datasheet - Page 21

• Manufacturer Part Number: PIC16C62B
• Description: 28-Pin 8-Bit CMOS Microcontrollers
• Manufacturer: Microchip Technology

3.2
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (=1) will make the corresponding PORTB pin
an input, i.e., put the corresponding output driver in a
hi-impedance mode. Clearing a TRISB bit (=0) will
make the corresponding PORTB pin an output, i.e., put
the contents of the output latch on the selected pin.
EXAMPLE 3-1:
BCF
CLRF
BSF
MOVLW
MOVWF
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION_REG<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are dis-
abled on a Power-on Reset.
FIGURE 3-3:
Data bus
WR TRIS
WR Port
RB0/INT
RBPU
1998 Microchip Technology Inc.
Note 1: I/O pins have diode protection to V
(2)
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
STATUS, RP0
PORTB
STATUS, RP0
0xCF
TRISB
PORTB and the TRISB Register
and clear the RBPU bit (OPTION_REG<7>).
BLOCK DIAGRAM OF
RB3:RB0 PINS
RD TRIS
RD Port
TRIS Latch
Data Latch
INITIALIZING PORTB
D
D
CK
CK
Schmitt Trigger
Buffer
;
; Initialize PORTB by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Q
Q
Q
DD
and V
EN
TTL
Input
Buffer
D
SS
.
V
P
RD Port
DD
weak
pull-up
I/O
pin
Preliminary
(1)
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 3-4:
Data bus
WR TRIS
WR Port
RBPU
Note 1: I/O pins have diode protection to V
RB7:RB6 in serial programming mode
Set RBIF
From other
RB7:RB4 pins
Any read or write of PORTB. This will end the
mismatch condition.
Clear flag bit RBIF.
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
(2)
and clear the RBPU bit (OPTION_REG<7>).
PIC16C62B/72A
RD TRIS
RD Port
Data Latch
TRIS Latch
RB7:RB4 PINS
D
D
BLOCK DIAGRAM OF
CK
CK
Q
Q
Q
Q
Latch
DD
EN
EN
DS35008A-page 21
D
D
and V
TTL
Input
Buffer
SS
V
P
DD
.
weak
pull-up
RD Port
Buffer
I/O
pin
Q1
Q3
ST
(1)