PIC16C76-10/JW Microchip Technology, PIC16C76-10/JW Datasheet - Page 120

• Manufacturer Part Number: PIC16C76-10/JW
• Description: 8-Bit CMOS Microcontrollers with A/D Converter
• Manufacturer: Microchip Technology

PIC16C7X
13.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 13-4. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
ance varies over the device voltage (V
The source impedance affects the offset voltage at the
analog input (due to pin leakage current). The maxi-
mum recommended impedance for analog sources
is 10 k . After the analog input channel is selected
(changed) this acquisition must be done before the con-
version can be started.
To
Equation 13-1 may be used. This equation calculates
the acquisition time to within 1/2 LSb error is used (512
steps for the A/D). The 1/2 LSb error is the maximum
error allowed for the A/D to meet its specified accuracy.
EQUATION 13-1:
V
Given: V
The above equation reduces to:
T
Example 13-1 shows the calculation of the minimum
required acquisition time T
based on the following system assumptions.
C
Rs = 10 k
1/2 LSb error
FIGURE 13-4: ANALOG INPUT MODEL
DS30390E-page 120
HOLD
CAP
HOLD
= -(51.2 pF)(1 k + R
calculate
= (V
= 51.2 pF
HOLD
A/D Acquisition Requirements
Applicable Devices
72 73 73A 74 74A 76 77
REF
= (V
- (V
S
HOLD
) and the internal sampling switch (R
REF
REF
the
Legend C
/512), for 1/2 LSb resolution
. The sampling switch (R
/512)) • (1 - e
VA
A/D MINIMUM CHARGING
TIME
minimum
SS
Rs
V
I leakage
R
SS
C
T
PIN
IC
HOLD
+ R
ACQ
ANx
S
C
5 pF
(-T
HOLD
) ln(1/511)
PIN
. This calculation is
CAP
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
acquisition
/C
) must be allowed
DD
HOLD
), Figure 13-4.
(R
IC
SS
+ R
V
) imped-
DD
SS
V
V
+ R
time,
T
T
SS
= 0.6V
= 0.6V
S
))
)
)
I leakage
500 nA
V
Temp (application system max.) = 50 C
V
EXAMPLE 13-1: CALCULATING THE
T
T
T
T
R
ACQ
ACQ
CAP
ACQ
DD
HOLD
IC
Note 1: The reference voltage (V
Note 2: The charge holding capacitor (C
Note 3: The maximum recommended impedance
Note 4: After a conversion has completed, a
= 5V
= -C
1k
= Amplifier Settling Time +
= 5 s + T
= 5 s + 5.747 s + [(50 C - 25 C)(0.05 s/ C)]
= 0 @ t = 0
Holding Capacitor Charging Time +
Temperature Coefficient
-51.2 pF (1 k + 7 k + 10 k ) ln(0.0020)
-51.2 pF (18 k ) ln(0.0020)
-0.921 s (-6.2364)
5.747 s
10.747 s + 1.25 s
11.997 s
V
SS R
DD
HOLD
Sampling
Switch
effect on the equation, since it cancels
itself out.
not discharged after each conversion.
for analog sources is 10 k . This is
required to meet the pin leakage specifi-
cation.
2.0T
sition can begin again. During this time
the holding capacitor is not connected to
the selected A/D input channel.
Rss = 7 k
6V
5V
4V
3V
2V
SS
AD
(R
CAP
IC
delay must complete before acqui-
MINIMUM REQUIRED
ACQUISITION TIME
Sampling Switch
5 6 7 8 9 10 11
+ [(Temp - 25 C)(0.05 s/ C)]
+ R
V
SS
C
= DAC capacitance
= 51.2 pF
( k )
SS
HOLD
1997 Microchip Technology Inc.
+ R
S
) ln(1/511)
REF
) has no
HOLD
) is