ISL6115 Intersil Corporation, ISL6115 Datasheet - Page 9

• Manufacturer Part Number: ISL6115
• Description: Power Distribution Controllers
• Manufacturer: Intersil Corporation

ISL6115EVAL1 Board
The ISL6115EVAL1 is configured as a +12V high side switch
controller with the CR level set at ~1.5A. (See Figure 21 for
ISL6115EVAL1 schematic and Table 4. for BOM.) Bias and
load connection points are provided along with test points for
each IC pin.
With the chip to be biased from the +12V bus being
switched, through B2, GND B5, the load connected between
B3 and B4 and with jumper J1 installed the ISL6115 can be
evaluated. PWRON pin pulls high enabling the ISL6115 if
not driven low.
With R2 = 750Ω the CR Vth is set to 15mV and with the
10mΩ sense resistor the ISL6115EVAL1 has a nominal CR
level of 1.5A. The 0.047µF delay time to latch-off capacitors
results in a nominal 4.4ms before latch-off of outputs after an
OC event.
Also included with the ISL6115EVAL1 board are one each of
the ISL6116, ISL6117 and ISL6120 for evaluation.
ISL6116EVAL1 Board
The ISL6116EVAL1 is default configured as a negative
voltage low side switch controller with a ~2.4A CR level.
(See Figure 22 for ISL6116EVAL1 schematic and Table 4
for BOM and component description.) This basic
configuration is capable of controlling both larger positive or
negative potential voltages with minimal changes.
FIGURE 21. ISL6115EVAL1 HIGH SIDE SWITCH APPLICATION
R1
Q1
V+ B2
R2
C1
R3
1
2
3
4
JP1
+
B3
ISL6115
U1
C3
LOAD
V
+12V
BIAS
9
8
7
6
5
B4
B1
R4
ISL6115, ISL6116, ISL6117, ISL6120
D1
-
C2
R5
PWRON
D2
DD1
3.3V
B5
J1
+VBUS
Bias and load connection points are provided in addition to
test points, TP1-8 for each IC pin. The terminals, J1 and J4
are for the bus voltage and return, respectively, with the
more negative potential being connected to J4. With the load
between terminals J2 and J3 the board is now configured for
evaluation. The device is enabled through LOGIN, TP9 with
a TTL signal. ISL6116EVAL1 includes a level shifting circuit
with an opto-coupling device for the PWRON input so that
standard TTL logic can be translated to the -V reference for
chip control.
When controlling a positive voltage, PWRON can be
accessed at TP8.
The ISL6116EVAL1 is provided with a high voltage linear
regulator for convenience to provide chip bias from ±24V to
±350V. This can be removed and replaced with the zener &
resistor bias scheme as discussed earlier. High voltage
regulators and power discrete devices are no longer
available from Intersil but can be purchased from other
semiconductor manufacturers.
Reconfiguring the ISL6116EVAL1 board for a higher CR
level can be done by changing the R
resistor values as the provided FET is 75A rated. If
evaluation at > 60V, an alternate FET must be chosen with
an adequate BV
HI J2
FIGURE 22. ISL6116EVAL1 NEGATIVE VOLTAGE LOW SIDE
R
G
1
R11
R6
LOAD
C1
CONTROLLER
C3
D2
J3 LO
DSS
R7
.
Q2
DD1
3.3V
I
SL6116
U1
R5
R1
R2
SENSE
R9
PWRON
R8
J4
-VBUS
TP8
and R
OT1
ISET
LOGIN
TP9
R10
ON
OFF
0-5V