74LCXH32245GX Fairchild Semiconductor, 74LCXH32245GX Datasheet

no-image

74LCXH32245GX

Manufacturer Part Number
74LCXH32245GX
Description
TXRX BIDIRECT 32BIT LV 96FBGA
Manufacturer
Fairchild Semiconductor
Series
74LCXHr
Datasheet

Specifications of 74LCXH32245GX

Logic Type
Transceiver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
8
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
96-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCXH32245GX
Manufacturer:
Fairchild Semiconductor
Quantity:
10 000
© 2003 Fairchild Semiconductor Corporation
74LCXH32245G
(Note 2) (Note 3)
74LCXH32245
Low Voltage 32-Bit Bidirectional Transceiver
with 5V Tolerant Inputs and Outputs with Bushold
General Description
The LCXH32245 contains thirty-two non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is designed for low volt-
age (2.5V or 3.3V) V
facing to a 5V signal environment. The device is byte
controlled. Each byte has separate control inputs which
could be shorted together for full 32-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
The LCXH32245 data inputs include bushold, eliminating
the need for external pull-up/down resistors to hold unused
inputs.
The LCXH32245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Ordering Code:
Note 2: Ordering Code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number
Package Number
CC
applications with capability of inter-
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
DS500727
Features
Note 1: To ensure the high-impedance state during power-up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
5V tolerant inputs and outputs
2.3V to 3.6V V
4.5 ns t
Power-off high impedance inputs and outputs
Bushold on inputs eliminates the need for external
pull-up/down resistors
Supports live insertion/withdrawal (Note 1)
Uses patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
24 mA output drive (V
Human body model
Machine model
Package Description
PD
max (V
CC
CC
specifications provided
200V
3.3V), 20 A I
CC
2000V
3.0V)
April 2002
Revised August 2003
CC
www.fairchildsemi.com
max

Related parts for 74LCXH32245GX

74LCXH32245GX Summary of contents

Page 1

... Note 2: Ordering Code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2003 Fairchild Semiconductor Corporation Features 5V tolerant inputs and outputs 2.3V to 3.6V V specifications provided CC 4 ...

Page 2

Connection Diagram (Top Thru View) Truth Tables Inputs Outputs OE T Bus B –B Data to Bus Bus A –A Data to Bus HIGH–Z State on ...

Page 3

Logic Diagrams Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com ...

Page 4

Absolute Maximum Ratings Symbol Parameter V Supply Voltage I/O Ports V DC Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current ...

Page 5

DC Electrical Characteristics Symbol Parameter I Input Leakage Current I I Bushold Input Minimum I(HOLD) Drive Hold Current I Bushold Input Over-Drive I(OD) Current to Change State I 3-STATE I/O Leakage OZ I Power-Off Leakage Current OFF I Quiescent Supply ...

Page 6

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input Characteristics; ...

Page 7

Schematic Diagram Generic for LCX Family 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

Related keywords