74ABT2952CMSA Fairchild Semiconductor, 74ABT2952CMSA Datasheet - Page 5
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74ABT2952CMSA
Manufacturer Part Number
74ABT2952CMSA
Description
IC REGISTERED TXRX 8BIT 24SSOP
Manufacturer
Fairchild Semiconductor
Series
74ABTr
Datasheet
1.74ABT2952CMTCX.pdf
(8 pages)
Specifications of 74ABT2952CMSA
Logic Type
Registered Transceiver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
t
t
t
t
t
t
C
C
t
(Note 14)
t
(Note 14)
t
(Note 15)
t
(Note 14)
t
(Note 16)
PLH
PHL
PZH
PZL
PHZ
PZL
OSHL
OSLH
PS
OST
PV
Extended AC Electrical Characteristics
(SOIC Package)
Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE delays are dominated by the RC network (500 , 250 pF) on the output and has been excluded from the datasheet.
Skew
(SOIC Package)
Note 12: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 13: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 14: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
LOW (t
Note 15: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 16: Propagation delay variation for a given set of conditions (i.e., temperature and V
tested.
Capacitance
Note 17: C
IN
I/O
Symbol
Symbol
(Note 17)
Symbol
OST
). This specification is guaranteed but not tested.
I/O
is measured at frequency f
Propagation Delay
CPA or CPB to A
Output Enable Time
OEA or OEB to A
Output Disable Time
OEA or OEB to A
HL Transitions
LH Transitions
LH/HL Transitions
LH/HL Transitions
Pin to Pin Skew
Pin to Pin Skew
Duty Cycle
LH–HL Skew
Pin to Pin Skew
Device to Device Skew
Input Capacitance
Output Capacitance
Parameter
n
n
n
or B
or B
or B
Parameter
n
Parameter
n
n
1 MHz, per MIL-STD-883, Method 3012.
8 Outputs Switching
T
V
A
Min
CC
1.5
1.5
1.5
1.5
1.5
1.5
OSHL
C
40 C to 85 C
(Note 8)
L
4.5V to 5.5V
), LOW to HIGH (t
50 pF
8 Outputs Switching
T
A
V
Max
5
Typ
6.0
6.0
6.0
6.0
6.0
6.0
CC
11
5
C
(Note 12)
40 C to 85 C
L
Max
4.5V–5.5V
1.0
1.0
2.0
2.1
2.5
50 pF
OSLH
CC
T
V
A
) from device to device. This specification is guaranteed but not
Min
CC
2.0
2.0
2.0
2.0
), or any combination switching LOW-to-HIGH and/or HIGH-to-
C
(Note 11)
L
(Note 9)
40 C to 85 C
Units
4.5V to 5.5V
pF
pF
250 pF
Max
8.0
8.0
8.0
8.0
8 Outputs Switching
T
V
V
A
V
CC
CC
CC
C
(Note 13)
L
40 C to 85 C
8 Outputs Switching
0V (Non I/O Pins)
5.0V (A
T
V
A
Max
4.5V–5.5V
1.5
2.0
4.5
4.5
5.0
Min
2.5
2.5
2.5
2.5
CC
250 pF
C
(Note 10)
L
(Note 11)
40 C to 85 C
n
4.5V to 5.5V
, B
Conditions
250 pF
T
www.fairchildsemi.com
A
n
)
25 C
Max
10.5
10.5
11.5
11.5
Units
ns
ns
ns
ns
ns
Units
ns
ns
ns