74ABT2541CSCX Fairchild Semiconductor, 74ABT2541CSCX Datasheet - Page 3

• Manufacturer Part Number: 74ABT2541CSCX
• Description: IC BUFF/DVR 8BIT NON-INV 20SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74ABTr

Specifications of 74ABT2541CSCX

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 32mA, 15mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

V
V
V
V
V
f
t
t
t
t
t
t
Symbol
t
t
t
t
t
t
DC Electrical Characteristics
(SOIC Package)
Note 5: Max number of outputs defined as (n). n-1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 6: Max number of data inputs (n) switching. n-1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
Guaranteed, but not tested.
Note 7: Max number of outputs defined as (n). n
AC Electrical Characteristics
Extended AC Electrical Characteristics
(SOIC Package)
TOGGLE
PLH
PHL
PZH
PZL
PHZ
PLZ
Note 8: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 9: This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 10: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11: The 3-STATE delays are dominated by the RC network (500
PLH
PHL
PZH
PZL
PHZ
PLZ
OLP
OLV
OHV
IHD
ILD
Symbol
Symbol
Quiet Output Maximum Dynamic V
Quiet Output Minimum Dynamic V
Minimum HIGH Level Dynamic Output Voltage
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
Maximum Toggle Frequency
Propagation Delay
Data to Outputs
Output Enable Time
Output Disable Time
Propagation Delay Data to Outputs
Output Enable Time
Output Disable Time
Parameter
Parameter
Parameter
OL

OL
1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
Min
1.5
1.5
1.5
1.5
1.0
1.0
8 Outputs Switching
V

40
CC
C
q
(Note 8)
L
Min

C to
2.7
2.0
0.5
Min
4.5V–5.5V
Typ
100
:
1.0
1.0
1.5
1.5
1.0
1.0
50 pF
, 250 pF) on the output and have been excluded from the datasheet.

85
q
C
3
Typ

0.6
3.1
1.4
1.2
T
0.4
C
V
Max
A
5.0
5.5
6.5
7.0
6.0
6.0
L
CC
Typ
2.3
3.3
3.7
4.3
3.5
3.7

50 pF
25

5V
q
Max
C
T
0.8
0.8
1 Output Switching
A
V
Min
1.5
1.5
2.5
2.5
CC
C

(Note 11)
40
L
(Note 9)
Max
3.6
6.0
6.0
4.1
6.5
5.6
4.5V–5.5V
q
C to
250 pF
Units
V
V
V
V
V
Max
10.0
11.0

6.0
7.5
85
q
C
T
V
A
5.0
5.0
5.0
5.0
5.0
Min
1.0
1.0
1.5
1.5
1.0
1.0
CC
V
T
8 Outputs Switching
CC
A

V
C
Min
2.5
2.5
2.5
2.5
40
CC
L
C

(Note 10)
(Note 11)
q
4.5V–5.5V
40
L
C to
T
T
T
T
T
50 pF
ILD
A
A
A
A
A
q
4.5V–5.5V
C to
250 pF
C
), 0V to threshold (V
www.fairchildsemi.com
L
25
25
25
25
25

85
Max
3.6
4.1
6.0
6.5
6.0
5.6
q
q
q
q
q
Max
12.5

11.0
8.5
9.5
50 pF, R
C (Note 5)
C (Note 5)
C (Note 6)
C (Note 7)
C (Note 7)
q
Conditions
85
C
q
C
L
Units
Units
500
MHz
ns
ns
ns
ns
ns
ns
IHD
:
).