FM25S16 FIDELIX, FM25S16 Datasheet
FM25S16
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FM25S16 Summary of contents
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... FM25S16 16M-BIT Serial Flash Memory with 4KB Sectors, Single I/O SPI FM25S16 Rev.07 (Mar.18. 2011) 1 ...
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... Revision History Change Correct typo. Write Status Register (01h) 0.6 previous bits => cleared to 0 Change Read instructions tSHSL20ns => 10ns Change 0.7 Added ‘Clock freq. Read Data instruction (03h)’ History FM25S16 Draft date Remark Jul.03,2009 preliminary Aug.07.2009 preliminary Jun.18.2010 Final Jun ...
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... Write Disable (04h)……………………………………………….….................. 20 11.2.6 Read Status Register-1(05h) and Read Status Register-2 (35h)...……........ 21 11.2.7 Write Status Register (01h)………………………………………..................... 22 FM25S16 Rev.07 (Mar.18. 2011) 3 ...
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... SOIC 150-mil …………………….........................................................................56 13.2 8-Pin SOIC 208-mil …………………….........................................................................57 13.3 8-Pin PDIP 300-mil ..................................................................................................... 58 13.4 8-contact 6x5 WSON................................................................................................... 59 13.5 8-contact 6x5 WSON Cont’d........................................................................................ 60 13.6 16-Pin SOIC 300-mil.................................................................................................... 61 14. ORDERING INFORMATION..........................................................................................................62 FM25S16 Rev.07 (Mar.18. 2011) 4 ...
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... The FM25S16 has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage ...
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... PIN CONFIGURATION SOIC 150-MIL/208-MIL / DO(IO DO( WP(IO / WP( GND GND Figure 1a. FM25S16 pin Assignments, 8-pin SOIC 208-mil 4. PAD CONFIGURATION WSON 6X5-MM /CS /CS DO(IO DO(IO /WP(IO /WP( GND GND Figure 1b. FM25S16 Pad Assignments, 8-pad WSON 5. PIN CONFIGURATION 8-Pin PDIP 300-Mil /CS DO(IO1) /WP(IO2) GND Figure 1c. FM25S16 Pin Assignments, 8-pin PDIP 300-mil ...
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... N/C N/C N/C N/C N/C N/C /CS /CS DO(IO DO( Figure 1d. FM25S16 Pin Assignments, 16-pin SOIC 300-mil I/O I Chip Select Input I/O Data Output (Data Input Output 1)*¹ I/O Write Protect Input (Data Input output) *² I/O Data Input (Data Input Output 0)*¹ I Serial Clock Input I/O Hold Input (Data Input output 3) *² Power Supply ...
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... Hold Input(Data Input Output 3)* ² Power Supply No Connect No Connect No Connect No Connect I Chip Select Input I/O Data output (Data Input Output 1)* ¹ I/O Write Protection Input (Data Input Output 2)* ² Ground No Connect No Connect No Connect No Connect I/O Data Input (Data Input Output 0)* ¹ I Serial Clock Input Rev.07 (Mar.18. 2011) FM25S16 8 ...
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... IO3. See figure 1a, 1b, 1c and 1d for the pin configuration of Quad I/O operation. 8.6 Serial Clock (CLK) The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. (“See SPI Operations”) FM25S16 Rev.07 (Mar.18. 2011) 9 ...
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... Byte Page buffer and 256 Byte Page buffer and 256 Byte Page buffer Data Data Data Byte Address Byte Address Byte Address Latch / Counter Latch / Counter Latch / Counter FM25S16 1FFFFFh 1FFFFFh 1FFFFFh Block 31 (64KB ) Block 31 (64KB ) Block 31 (64KB ) 1FF0FFh 1FF0FFh 1FF0FFh 10FFFFh 10FFFFh ...
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... If /CS is driven active high during a HOLD condition, it resets the internal logic of the device. As long as /HOLD signal is low, the memory remains in the HOLD condition. To resume communication with the device, /HOLD must be driven active high, and /CS must be driven active low. See 12.11 for HOLD timing. FM25S16 Rev.07 (Mar.18. 2011) 11 ...
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... Write Protect (/WP) pin, changes to the Status Register can be enabled or disabled under hardware control. See Status Register for further information. Additionally, the Power-down instruction offers an extra level of write protection as all instructions are ignored except for Release power-down instruction. FM25S16 Rev.07 (Mar.18. 2011) 12 ...
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... The non-volatile Sector protect bit (SEC) controls if the Block Protect Bits (BP2, BP1, BP0) protect 4KB Sectors (SEC=1)or 64KB Blocks (SEC=0) in the Top (TB=0) or the Bottom (TB=1) of the array as shown in the Status Register Memory protection table. The default setting is SEC=0. FM25S16 Rev.07 (Mar.18. 2011) 13 ...
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... When /WP pin is high the Status register is unlocked and can be written to after a Write Enable instruction, WEL=1 Status Register is protected and can not be written to again until the next power-down, power-up cycle Status Register is permanently protected and can not be written to. Rev.07 (Mar.18. 2011) FM25S16 ( ...
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... Figure 3a. Status Register-1 Figure 3b. Status Register-2 FM25S16 Rev.07 (Mar.18. 2011) 15 ...
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... Rev.07 (Mar.18. 2011) FM25S16 DENSITY PROTION NONE NONE 64KB Upper 1/32 128KB Upper 1/16 256KB Upper 1/8 512KB Upper 1/4 1MB Upper 1/2 64KB Lower 1/32 128KB Lower 1/16 256KB Lower 1/8 512KB Lower 1/4 1MB ...
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... Status Register is being written, all instructions except for Read Register will be ignored until the program or erase cycle has completed. 11.2.1 Manufacturer and Device Identification MANUFACTRER ID Fidelix Semiconductor Serial Flash Device ID Instruction FM25Q16 (M7-M0) F8h (ID7-ID0) ABh, 90h 14h FM25S16 (ID15-ID0) 9Fh 3215h Rev.07 (Mar.18. 2011) 17 ...
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... A23-A16 A15-A8 A7-A0 A23-A16 A15-A8 A7-A0 A23-A16 A15-A8 A7-A0 dummy dummy dummy dummy dummy 00h or 01h dummy dummy 00h or 01h dummy dummy 00h or 01h (S7-S0) (M7-M0) (ID7-ID0) (ID7-ID0) Memory Type Capacity FM25S16 BYTE 5 BYTE 6 (D7-D0) 3 (D7-D0, …) 3 (D7-D0, …) (5) (ID7-ID0) (M7-M0) (ID7-ID0) (M7-M0) (ID7-ID0) (M7-M0…) (ID7-ID0…) Rev.07 (Mar.18. 2011) 18 ...
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... IO0 = ( D4, D0…) IO1 = ( D5, D1…) IO2 = ( D6, D2…) IO3 = ( D7, D3…) BYTE 2 BYTE 3 A23-A16 A15-A8 A23-A16 A15-A8 (2) (2) A23-A8 A7-A0, M7-M0 (D7-D0, …) (4) (5) (x,x,x,x, D7-D0,…) (D7-D0, …) FM25S16 BYTE 4 BYTE 5 BYTE 6 A7-A0 (D7-D0) A7-A0 dummy (D7-D0) (1) (3) Rev.07 (Mar.18. 2011) 19 ...
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... Instruction (06 h) Instruction (06 h) High Impedance High Impedance Instruction (04 h) Instruction (04 h) High Impedance High Impedance FM25S16 Mode 3 Mode 3 Mode 0 Mode 0 Mode 3 Mode 3 Mode 0 Mode 0 Rev.07 (Mar.18. 2011) 20 ...
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... Status Register out Status Register out FM25S16 Status Register out Status Register out Rev.07 (Mar.18. 2011) ...
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... CLK Mode 0 Instruction (01h =MSB Figure 7. Write Status Register Instruction Sequence Diagram Status Register1 High Impedance FM25S16 Mode 3 Mode 0 Status Register2 Rev.07 (Mar.18. 2011) 22 ...
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... Instruction (03h) DI High Impedance DO =MSB Figure 8. Read Data Register Instruction Sequence Diagram (see AC Electrical Characteristics 24-Bit Address FM25S16 Data Out 1 Data Out Rev.07 (Mar.18. 2011) 23 ...
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... DO =MSB Figure 9. Fast Read Register Instruction Sequence Diagram (see AC Electrical Characteristics). This is accomplished 24-Bit Address Data Out FM25S16 Data Out Rev.07 (Mar.18. 2011) 24 ...
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... A Mode Bit Reset instruction can be used to reset Mode Bits (M7-0) before issuing normal instructions (See 11.2.25 for detailed descriptions). Figure 10a. Fast Read Dual Input/Output Instruction Sequence Diagram (M7-0 = 0xh or NOT Axh) FM25S16 Rev.07 (Mar.18. 2011) 25 ...
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... Figure 10b. Fast Read Dual Input/Output Instruction Sequence Diagram (M7-0 = Axh) FM25S16 Rev.07 (Mar.18. 2011) 26 ...
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... A23-16 A15-8 A23-16 A15-8 A7-0 A7-0 M7-0 M7-0 Dummy Dummy Byte3 Dummy Dummy Byte3 FM25S16 , and IO and Switches from IO Switches from Input to Output Input to Output ...
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... M7-0 M7-0 Dummy Dummy Dummy Dummy Byte 1 Byte 1 Rev.07 (Mar.18. 2011) FM25S16 Byte 2 Byte 2 28 ...
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... Data Byte 3 Data Byte FM25S16 Data Byte 1 Data Byte 1 Data Byte ...
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... FM25S16 IO and IO The Quad Data Byte 2 Byte 2 Byte 3 Byte 3 Byte 4 Byte ...
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... FM25S16 IO IO and Byte 3 Byte 3 Byte 3 Byte 3 Byte 4 Byte 4 Byte 4 Byte ...
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... After the Sector Erase cycle has finished the Write Enable Latch (WEL) bit in Status Register is cleared to 0. The Sector Erase instruction will not be executed if the addressed page is protected by the Block Protect (SEC, TB, BP2, BP1, and BP0) bits (see Status Register Memory protection table). Figure 15. Sector Erase Instruction Sequence Diagram FM25S16 Rev.07 (Mar.18. 2011) 32 ...
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... After the Sector Erase cycle has finished the Write Enable Latch (WEL) bit in Status Register is cleared to 0.The Block Erase instruction will not be executed if the addressed page is protected by the Block Protect (SEC, TB, BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 16. 32KB Block Erase Instruction Sequence Diagram FM25S16 Rev.07 (Mar.18. 2011) 33 ...
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... MSB = MSB * * Figure 17. 64KB Block Erase Instruction Sequence Diagram 24-bit Address 24-bit Address High Impedance High Impedance FM25S16 Mode 3 Mode Mode 0 Mode Rev.07 (Mar.18. 2011) 34 ...
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... Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Chip Erase instruction will not be executed if any page is protected by the Block Protect (SEC, TB, BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 18. Chip Erase Instruction Sequence Diagram FM25S16 Rev.07 (Mar.18. 2011) 35 ...
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... Erase Suspend. After issued the BUSY bit in the status register will be set and the sector or block will complete the erase operation. Erase Resume instruction will be ignored unless an Erase Suspend operation is active. Figure 20. Erase Resume instruction Sequence tSUS FM25S16 Mode 3 Mode 0 Accept Read or Program Instruction Rev.07 (Mar.18. 2011) 36 ...
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... Ignoring all but one instruction makes the Power Down state a useful condition for securing maximum write protection. The device always powers-up in the normal operation with the standby current of ICC1. Figure 21. Deep Pwer-down Instruction Sequence Diagram FM25S16 Rev.07 (Mar.18. 2011) 37 ...
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... Power Down Current Power Down Current Power Down Current Power Down Current FM25S16 Mode 3 Mode 3 Mode 3 Mode 3 Mode 0 Mode 0 Mode 0 Mode 0 Stand-by Current Stand-by Current Stand-by Current Stand-by Current Rev.07 (Mar.18. 2011) 38 ...
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... Power Down Current Power Down Current Power Down Current Rev.07 (Mar.18. 2011) FM25S16 Mode 3 Mode 3 Mode 3 Mode 0 Mode 0 Mode 0 tRES 2 tRES 2 tRES Stand-by Current Stand-by Current Stand-by Current 39 ...
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... If the 24-bit address is initially set to 000001h the Device ID will be read first and then followed by the Manufacturer ID. The Manufacturer and Device IDs can be read continuously, alternating from one to the other. The instruction is completed by driving/CS high. Figure 23a. Read Manufacturer/ Device ID Diagram FM25S16 Rev.07 (Mar.18. 2011) 40 ...
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... Figure 23b. Read Dual Manufacturer/ Device ID Diagram FM25S16 Rev.07 (Mar.18. 2011) 41 ...
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... Figure 23c. Read Quad Manufacturer/ Device ID Diagram FM25S16 Rev.07 (Mar.18. 2011) 42 ...
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... Figure 24. Read JEDEC ID FM25S16 ...
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... Figure 25. Mode Bits Reset for Fast Read Dual/Quad I Instruction (FFh) Instruction (FFh) Don ’ t Care Don ’ t Care Don ’ t Care Don ’ t Care Don ’ t Care Don ’ t Care Rev.07 (Mar.18. 2011) FM25S16 7 7 Mode 3 Mode 3 Mode 0 Mode 0 44 ...
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... Figure 27. Exit Secured OTP instruction sequence Instruction (B1h) Instruction (B1h Instruction (C1h) Instruction (C1h) Rev.07 (Mar.18. 2011) FM25S16 Mode 3 Mode 3 Mode 0 Mode 0 Mode 3 Mode 3 Mode 0 Mode 0 45 ...
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... Bit4 Bit3 Bit2 reserved reserved reserved Volatile Volatile Volatile bit bit bit FM25S16 Security Register out Security Register out ...
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... Mode Mode 0 Mode 0 Mode 0 Mode 0 Instruction Instruction Instruction Instruction ( High Impedance High Impedance High Impedance High Impedance FM25S16 Rev.07 (Mar.18. 2011) 47 ...
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... Note. Once lock-down whatever by factory or customer, it cannot be changed any more. While in 4K-bit secured OTP mode, array access is not allowed to write. 4K-bit secured OTP definition Address range 000000 ~ 00000F 000010 ~ 0001FF Standard Size Factory Lock ESN 128-bit (Electrical Serial Number) N/A 3968-bit FM25S16 Customer Lock Determined by customer Rev.07 (Mar.18. 2011) 48 ...
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... Tj (1) CONDITIONS Relative to Ground IO <20nS Transient IOT Relative to Ground STG LEAD Human ESD (3) Body Model CONDITIONS F =85㎒ 50㎒ Industrial FM25S16 RANGE UNIT -0.6 to +4.0 V -0.6 to VCC +4.0 V -2.0V to VCC +2.0V V -65 to +150 ˚C (2) See Note ˚C -2000 to +2000 V SPEC UNIT MIN MAX 2.7 3 ...
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... MIN 100,000 SPEC SYMBOL MIN (1) tVSL 10 (1) tPUW 1 (1) VWI 1 tVSL tVSL Read Instructions Read Instructions Allowed Allowed tPUW tPUW Rev.07 (Mar.18. 2011) FM25S16 MAX UNIT Cycles 20 years UNIT MAX ㎲ 10 ㎳ Device is Fully Device is Fully Accessible Accessible Time Time 50 ...
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... VIN=GND or VCC C=0.1 VCC / 0.9VCC IO=Open C=0.1 VCC / 0.9VCC IO=Open C=0.1 VCC / 0.9VCC IO=Open C=0.1 VCC / 0.9VCC IO=Open /CS=VCC /CS=VCC /CS=VCC /CS=VCC -0.5 VCC x0.8 IOL=1.6㎃ IOH=-100㎂ VCC -0.2 FM25S16 SPEC UNIT TYP MAX 6 ㎊ 8 ㎊ ±2 ㎂ ±2 ㎂ ㎂ ㎂ ...
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... VCC VCC IN IN 0.3 VCC VCC OUT 0.5 VCC VCC Input and Output Input and Output Input and Output Timing Reference Levels Timing Reference Levels Timing Reference Levels 0.5 VCC 0.5 VCC 0.5 VCC Rev.07 (Mar.18. 2011) FM25S16 UNIT ㎊ ㎱ ...
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... Rev.07 (Mar.18. 2011) FM25S16 UNIT MAX 85 ㎒ 104 ㎒ 50 ㎒ ㎱ V/㎱ V/㎱ ㎱ ㎱ ㎱ ㎱ ㎱ ㎱ ㎱ 7 ㎱ 7/6 ㎱ ㎱ ㎱ 53 ...
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... 200 BE1 t 300 BE2 & Industrial temperature applies Rev.07 (Mar.18. 2011) FM25S16 UNIT MAX ㎱ ㎱ ㎱ 7 ㎱ 12 ㎱ ㎱ ㎱ 3 ㎲ 3 ㎲ 1.8 ㎲ 20 ㎲ 15 ㎳ 150 ㎲ 5 ㎳ 300 ㎳ 1000 ㎳ ...
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... Serial Output Timing 12.10 Input Timing 12.11 Hold Timing FM25S16 Rev.07 (Mar.18. 2011) 55 ...
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... Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. MAX MIN 1.72 0.058 0.24 0.004 1.45 0.50 0.013 0.25 0.0075 4.95 0.189 6.19 0.228 4.00 0.150 1.27 0.015 8˚ 0˚ 0.076 --- FM25S16 INCHES MAX 0.068 0.009 0.057 0.020 0.098 0.195 0.244 0.157 0.050 BSC 0.050 8˚ 0.003 Rev.07 (Mar.18. 2011) 56 ...
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... Formed leads shall be planar with respect to one another within. 0004 inches at the seating plane. MILLIMETERS INCHES MIN MAX MIN 1.75 2.16 0.069 0.05 0.25 0.002 1.70 1.91 0.067 0.35 0.48 0.014 0.19 0.25 0.007 5.18 5.38 0.204 7.70 8.10 0.303 5.18 5.38 0.204 1.27 BSC 0.050 BSC 0.50 0.80 0.020 0˚ 8˚ 0˚ --- 0.10 --- FM25S16 MAX 0.085 0.010 0.075 0.019 0.010 0.212 0.319 0.212 0.031 8˚ 0.004 Rev.07 (Mar.18. 2011) 57 ...
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... L 0.120 α 0.335 S --- Dimension in min Nom MAX MIN --- 0.210 --- --- --- 0.381 0.130 0.135 3.18 0.018 0.022 0.41 0.060 0.064 1.47 0.010 0.014 0.20 0.365 0.370 9.14 0.300 0.310 7.37 0.250 0.255 6.22 0.100 0.110 2.29 0.130 0.140 3.05 --- 15 0 0.355 0.375 8.51 --- 0.045 --- FM25S16 Nom MAX --- 5.334 --- --- 3.30 3.43 0.46 0.56 1.52 1.63 0.25 0.36 9.27 9.40 7.62 7.87 6.35 6.48 2.54 2.79 3.30 3.56 --- 15 9.02 9.53 --- 1.14 Rev.07 (Mar.18. 2011) 58 ...
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... MAX MIN 0.75 0.80 0.0276 0.02 0.05 0.0000 0.55 0.20 0.25 0.0075 0.40 0.48 0.0138 6.00 6.10 0.2320 3.40 3.50 0.1299 5.00 5.10 0.1930 4.30 4.40 0.1653 1.27 BSC 0.0080 0.60 0.75 0.0197 FM25S16 INCHES TYP. MAX 0.0295 0.0315 0.0008 0.0019 0.0126 0.0080 0.0098 0.0157 0.0190 0.2360 0.2400 0.1338 0.1377 0.1970 0.2010 0.1692 0.1732 0.0500 BSC 0.0236 0.0295 Rev.07 (Mar.18. 2011) 59 ...
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... The metal pad area on the bottom center of the package is connected to the device ground (GND pin). Avoid placement of exposed PCB bias under the pad. MILLIMETERS TYP. MAX MIN SOLDER PATTERN 3.40 4.30 6.00 0.50 0.75 FM25S16 INCHES TYP. MAX 0.1338 0.1692 0.2360 0.0196 0.0255 Rev.07 (Mar.18. 2011) 60 ...
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... Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. INCHES MAX MIN 2.64 0.093 0.30 0.005 0.51 0.013 0.28 0.007 10.49 0.397 10.64 0.394 7.59 0.291 0.050 1.27 0.015 8˚ 0˚ 0.076 --- Rev.07 (Mar.18. 2011) FM25S16 MAX 0.104 0.012 0.020 0.000 0.413 0.419 0.299 0.050 8˚ 0.003 61 ...
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... ORDERING INFORMATION FM25S16 Rev.07 (Mar.18. 2011) 62 ...