MT9075B Mitel Networks Corporation, MT9075B Datasheet - Page 15

• Manufacturer Part Number: MT9075B
• Description: E1 Single Chip Transceiver
• Manufacturer: Mitel Networks Corporation

Preliminary Information
used to control the transmit channel associated
signalling. The DSTi and DSTo streams contain the
transmit and receive voice and digital data.
Identification Code
The MT9075B shall be identified by the code
10101010, read from the identification code status
register (page 03H, address 1FH).
Reset Operation (Initialization)
The MT9075B can be reset using the hardware
RESET pin (pin 11 in PLCC, pin 84 in MQFP, see pin
description for external reset circuit requirements) or
the software reset bit RST (page 01H, address 11H).
When the device emerges from its reset state it will
begin to function with the default settings described
in Table 6. A reset operation takes 1 full frame (125
us) to complete.
Transmit AIS Operation
The pin TAIS (Transmit AIS, pin 60 in PLCC, pin 48 in
MQFP) allows an all ones signal to be transmitted
from the point of power-up without the need to write
any control registers. During this time the IRQ pin is
tristated. After the interface has been initialized
normal operation can take place by making TAIS
high.
Transmit MFAS (CAS)
Per Time Slot Control
ABCD Bit Debounce
Tx Message Buffer
Transmit non-FAS
CRC Interworking
Error Insertion
RxMF Output
Transmit FAS
Loopbacks
Signalling
Function
Data Link
Interrupts
Counters
HDLCs
Buffer
Mode
Table 6 - Reset Status
interrupts not suspended
All locations set to 54H
Signalling Multiframe
Interrupt Mask Word
All locations cleared
Zero unmasked, all
others masked;
CAS Registers
1/S
Deactivated
Deactivated
Deactivated
Deactivated
Deactivated
Termination
C
00001111
Activated
n
Cleared
Status
n
0011011
1111111
National Bit Buffers
Table 7 shows the contents of the transmit and
receive Frame Alignment Signals (FAS) and Non-
frame Alignment Signals (NFAS) of time slot zero of
a PCM 30 signal. Even numbered frames (CRC
Frame # 0, 2, 4,...) are FASs and odd numbered
frames (CRC Frame # 1, 3, 5,...) are NFASs. The bits
of each channel are numbered 1 to 8, with bit 1 being
the most significant and bit 8 the least significant.
Table 8 illustrates the organization of the MT9075B
transmit and receive national bit buffers. Each row is
an addressable byte of the MT9075B national bit
buffer, and each column contains the national bits of
an odd numbered frame of each CRC-4 Multiframe.
The transmit and receive national bit buffers are
located at page 0DH and 0EH respectively.
CRC
0/FAS
1/NFAS
2/FAS
3/NFAS
4/FAS
5/NFAS
6/FAS
7/NFAS
8/FAS
9/NFAS
10/FAS
11/NFAS
12/FAS
13/NFAS
14/FAS
15/NFAS
Table 7 - FAS and NFAS Structure
Frame/
Type
CRC
indicates position of CRC-4 multiframe alignment signa
C
C
C
C
C
C
C
E
C
E
1
0
0
1
0
1
1
1
2
1
2
3
4
1
2
3
4
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
PCM 30 Channel Zero
A
A
A
A
A
A
A
A
3
0
0
0
0
0
0
0
0
S
S
S
S
S
S
S
S
4
1
1
1
1
1
1
1
1
a4
a4
a4
a4
a4
a4
a4
a4
S
S
S
S
S
S
S
S
MT9075B
5
1
1
1
1
1
1
1
1
a5
a5
a5
a5
a5
a5
a5
a5
S
S
S
S
S
S
S
S
6
0
0
0
0
0
0
0
0
a6
a6
a6
a6
a6
a6
a6
a6
S
S
S
S
S
S
S
S
7
1
1
1
1
1
1
1
1
a7
a7
a7
a7
a7
a7
a7
a7
S
S
S
S
S
S
S
S
8
1
1
1
1
1
1
1
1
a8
a8
a8
a8
a8
a8
a8
a8
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