MT8950 Mitel Networks Corporation, MT8950 Datasheet - Page 2

• Manufacturer Part Number: MT8950
• Description: ISO-CMOS ST-BUS FAMILY Data Codec
• Manufacturer: Mitel Networks Corporation

MT8950
6-4
Pin Description
Pin #
1
2
3
4
5
6
7
8
9
ISO-CMOS
Name
DSTo
CSTi
DSTi
RxE
D
C2i
F1i
CA
DF
X
1
Control ST-BUS In (TTL Input) - This ST-BUS interface pin accepts a serial input
stream which loads the Control Register.
device, the bits in the Violation word, and, the resetting of Data Activity (DA) and
Scan Point output (SPo) are controlled by this register. The contents of the register
are updated once every ST-BUS frame when the interface is enabled.
Data ST-BUS In (TTL Input) - Accepts the 8 bits of TEM Data when the ST-BUS
interface is enabled.
2.048 MHz Clock (TTL Input) - This is the input for the 2.048 MHz clock.
ST-BUS Output (Three-State Output) - This is the 2.048 Mbps serial output for
theTEM encoded word. It is enabled when both F1i and CA are low.
Framing Type 1 Input (TTL Input) - This active low input, in conjunction with CA,
enables the ST-BUS interface (DSTi, DSTo and CSTi). It is internally sampled on
every positive edge of the C2i clock and provides frame synchronization.
Control Address (TTL Input) - This active low input (in conjunction with F1i)
enables the ST-BUS interface.
Data Format Select (CMOS Input) - When HIGH, the Data Codec accepts and
delivers the data in unipolar Return to Zero (RZ) format. When LOW, the data
format is unipolar NRZ.
Received Energy Signal (Schmitt Input) - When RxE goes LOW it establishes the
polarity of the input pins D
last pulse before RxE goes LOW is established as the unipolar MARK input. RxE
also enables the operation of DA and SPo outputs the loopback modes (Modes 4, 5
and 6) of the codec, RxE is forced to the LOW state internally independent of the pin
condition. RxE should be exerted LOW for the duration of a data call.
Data Transmit 1 (Schmitt Input) - If DF= LOW, accepts data in the NRZ format.
(HIGH = MARK, LOW = SPACE).
If DF=HIGH, accepts active low unipolar pulses representing the digital data in the
RZ format. MARK or SPACE polarity is established by the RxE input.
NRZo
DSTo
CSTi
DSTi
DX1
DX2
VSS
RxE
C2i
Figure 2 - Pin Connections
F1i
CA
DF
10
11
12
1
2
3
4
5
6
7
8
9
X
1 and D
24
23
22
21
20
19
18
17
16
15
14
13
X
Description
2 in the RZ mode. The input which received the
VDD
NC
PRST
NC
NC
DR1
DR2
DA
SPo
SPi
DP
SCLK
The mode of operation of the