1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
Block Diagram
Designed for low voltage operation
V
Hysteresis on all inputs
Typical V
< 0.8V at V
Typical V
< 2.0V at V
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packaging:
– 48-pin 240-mil wide plastic TSSOP (A)
CC
= 2.3V to 3.6V
OLP
OHV
CC
CC
1
(Output Ground Bounce)
DIR
(Output V
1
1
1
1
1
1
1
1
= 3.3V, T
= 3.3V, T
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
A
A
OH
= 25°C
= 25°C
Undershoot)
1
1
1
1
1
1
1
1
1
OE
B
B
B
B
B
B
B
B
0
1
2
3
4
5
6
7
1
Description
Pericom Semiconductor’s PI74ALVCH16245 is a 16-bit bidirectional
transceiver designed for asynchronous two-way communication
between data buses. The direction control input pin (xDIR)
determines the direction of data flow through the bidirectional
transceiver. The Direction and Output Enable controls are designed
to operate this device as either two independent 8-bit transceivers
or one 16-bit transceiver. The output enable (OE) input, when HIGH,
disables both A and B ports by placing them in Hi-Z condition.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
minimum value of the resistor is determined by the current sinking
ability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
2
DIR
2
2
2
2
2
2
2
2
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
3.3V 16-Bit Bidirectional Transceiver
CC
PI74ALVCH16245
with 3-State Outputs
through a pull-up resistor; the
2
2
2
2
2
2
2
2
2
OE
B
B
B
B
B
B
B
B
0
1
2
3
4
5
6
7
PS8088E
10/05/04