SSTV16859 Fairchild Semiconductor, SSTV16859 Datasheet - Page 3
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SSTV16859
Manufacturer Part Number
SSTV16859
Description
Dual Output 13-Bit Register
Manufacturer
Fairchild Semiconductor
Datasheet
1.SSTV16859.pdf
(8 pages)
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Functional Description
The SSTV16859 is a 13-bit dual register with SSTL-2 com-
patible inputs and outputs. Input data is transferred to out-
put data on the rising edge of the differential clock pair.
When the RESET signal is asserted LOW all outputs are
placed into the LOW logic state and all input comparators
are disabled for power savings. Output glitches are pre-
vented by disabling the internal registers more quickly than
the input comparators. When RESET is removed, the sys-
tem designer must insure the clock and data inputs to the
Logic Diagram
For n = 1 to 13
3
device are stable during the rising transition of the RESET
signal.
The SSTL-2 data inputs transition based on the value of
V
the trip point of the input buffers of the SSTV16859 and
other SSTL-2 compatible devices.
The RESET signal is a standard CMOS compatible input
and is not referenced to the V
REF
. V
REF
is a stable system reference used for setting
REF
signal.
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