74HCT85DB,112 NXP Semiconductors, 74HCT85DB,112 Datasheet - Page 13

IC COMPARATOR MAGNITUDE 16SSOP

74HCT85DB,112

Manufacturer Part Number
74HCT85DB,112
Description
IC COMPARATOR MAGNITUDE 16SSOP
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
Magnitude Comparatorr

Specifications of 74HCT85DB,112

Package / Case
16-SSOP
Number Of Bits
4
Delay Time - Propagation
26ns
Voltage - Supply
4.5 V ~ 5.5 V
Product
Digital Comparators
Input Bias Current (max)
0.008 mA
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Propagation Delay Time
44 ns
Current - Supply
-
Operating Temperature
-
Logic Family
HCT
Technology
CMOS
High Level Output Current
-4mA
Low Level Output Current
4mA
Output Function
A<B, A=B, A>B
Package Type
SSOP
Quiescent Current
8uA
Mounting
Surface Mount
Pin Count
16
Polarity
Non-Inverting
Abs. Propagation Delay Time
66ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Operating Temperature
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2911-5
935190310112
Philips Semiconductors
AC waveforms 74HCT
Test circuit for 74HCT
March 1988
handbook, full pagewidth
HCMOS family characteristics
C
R
(1) In Fig.9 the active transition of the clock is going from LOW-to-HIGH and the active level of the forcing signals
(2) For AC measurements: t
Fig.9
L
T
(SET, RESET and PRESET) is HIGH. The actual direction of the transition of the clock input and the actual
active levels of the forcing signals are specified in the individual device data sheet.
=
=
Set-up times, hold times, removal times, propagation delays and the maximum clock pulse frequency for
sequential logic ICs.
load capacitance including jig and probe capacitance (see AC
CHARACTERISTICS for values).
termination resistance should be equal to the output impedance Z
the pulse generator.
OUTPUT
PRESET
CLOCK
RESET,
r
INPUT
INPUT
INPUT
DATA
SET,
= t
f
= 6 ns; when measuring f
handbook, halfpage
GENERATOR
10%
1.3 V
PULSE
t su
t rem
1.3 V
t r
10%
1.3 V
t PLH
90%
t WH
max
Fig.10 Test circuit.
1.3 V
V I
90%
t h
, there is no constraint on t
1/f max
t TLH
t f
R T
13
t WL
o
D.U.T
V CC
t su
of
t PHL
V O
r
, t
f
with 50% duty factor.
C L
t h
FAMILY SPECIFICATIONS
t THL
MGK565
50 pF
MGK568
3 V
GND
3 V
GND
3 V
GND

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