ISL43L410 Intersil Corporation, ISL43L410 Datasheet - Page 6

• Manufacturer Part Number: ISL43L410
• Description: DPDT Analog Switch
• Manufacturer: Intersil Corporation

Test Circuits and Waveforms
Detailed Description
The ISL43L410 is a bidirectional, double pole/double throw
(DPDT) analog switch that offers precise switching capability
from a single 1.65V to 3.6V supply with low on-resistance
(0.25Ω) and high speed operation (t
The device is especially well suited for portable battery
powered equipment due to its low operating supply voltage
(1.65V), low power consumption (2.7µW max), low leakage
currents (60nA max), and the tiny DFN and MSOP packages.
The ultra low on-resistance and Ron flatness provide very low
insertion loss and distortion to applications that require signal
reproduction.
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
SIGNAL
GENERATOR
SIGNAL
GENERATOR
ANALYZER
ANALYZER
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
R
R
0V or V+
L
L
ADD
NO or NC
COM
NO or NC
COM
6
GND
GND
NC or NO
ON
INH
= 12ns, t
INH
COM
V+
V+
(Continued)
ADD
C
C
0V or V+
OFF
50Ω
= 5ns).
N.C.
ISL43L410
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
Repeat test for all switches.
Repeat test for all switches.
V
NX
IMPEDANCE
ANALYZER
R
ON
100mA
FIGURE 7. CAPACITANCE TEST CIRCUIT
= V
1
FIGURE 5. R
/100mA
V
1
COM
NO or NC
ON
TEST CIRCUIT
NO or NC
COM
GND
GND
INH
V+
ADD
INH
V+
C
ADD
0V or V+
0V or V+
C
July 28, 2006
FN6090.2