ISL54059 Intersil Corporation, ISL54059 Datasheet
ISL54059
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ISL54059 Summary of contents
Page 1
... The digital inputs are1.8V ON OFF logic-compatible +3V supply. The ISL54059 is offered in a small form factor package, alleviating board space limitations available in a tiny 10 Ld 1.8x1.4mm µTQFN 3x3mm TDFN package. The ISL54059 is a committed dual single-pole/double-throw (SPDT) that consist of two normally open (NO) and two normally closed (NC) switches with independent logic control ...
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... ISL54059IRTZ 4059 (Note 3) ISL54059IRTZ-T 4059 (Notes 2, 3) ISL54059IRUZ-T 7 (Notes 2, 4) NOTES: 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020 ...
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... Figure 6) Total Harmonic Distortion f = 20Hz to 20kHz, V -3dB Bandwidth V COM 3 ISL54059 Thermal Information Thermal Resistance (Typical 3x3 TDFN Package (Notes µTQFN Package (Note Maximum Junction Temperature (Plastic Package +150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C Pb-Free Reflow Profile .see link below http://www ...
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... C L (see Figure 6) Total Harmonic Distortion f = 20Hz to 20kHz, V NOx or NCx OFF Capacitance 1MHz (see Figure 7) C OFF 4 ISL54059 Test Conditions +4.5V to +5.5V, GND = 0V, V Otherwise Specified. (Continued) TEST CONDITIONS = Test Conditions +3.9V to +4.5V, GND = 0V, V Otherwise Specified. ...
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... COM(ON) DIGITAL INPUT CHARACTERISTICS Input Voltage Low, V INL Input Voltage High, V INH Input Current 3.3V, V INH INL 5 ISL54059 Test Conditions +3.9V to +4.5V, GND = 0V, V Otherwise Specified. (Continued) TEST CONDITIONS = 2.85V Test Conditions +2.7V to +3.3V, GND = 0V, V Otherwise Specified. ...
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... Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range. 13. r matching between channels is calculated by subtracting the channel with the highest max r ON value, between NC1 and NC2 or between NO1 and NO2. 14. Limits established by characterization and are not production tested. 6 ISL54059 Test Conditions +1.8V, GND = 0V Specified TEST CONDITIONS = 100mA ( ...
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... LOGIC OFF INPUT Q = Δ OUT L FIGURE 2A. MEASUREMENT POINTS V+ LOGIC INPUT 0V SWITCH OUTPUT V OUT 0V FIGURE 3A. MEASUREMENT POINTS 7 ISL54059 t < 5ns r t < 5ns f OUT 90% LOGIC INPUT Repeat test for all switches. C capacitance. FIGURE 1. SWITCHING TIMES Repeat test for all switches. ...
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... Signal direction through switch is reversed, worst case values are recorded. Repeat test for all switches. FIGURE 6. CROSSTALK TEST CIRCUIT Detailed Description The ISL54059 is a bi-directional, dual single pole-double throw (SPDT) analog switch that offers precise switching from a single 1.8V to 6.5V supply with low ON-resistance (0.83Ω) and high speed operation (t ...
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... INPUTS GND FIGURE 8. OVERVOLTAGE PROTECTION Power-Supply Considerations The ISL54059 construction is typical of most single supply CMOS analog switches, in that they have two supply pins: V+ and GND. V+ and GND drive the internal CMOS switches and set their analog voltage limits. Unlike switches with a 5.5V maximum supply voltage, the ISL54059’s 6.5V maximum supply voltage provides plenty of head room for the 10% tolerance of 5 ...
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... V (V) COM FIGURE 11. ON-RESISTANCE vs SWITCH VOLTAGE 2 1.8V 2 100mA COM 1.8 1.6 1.4 1.2 1.0 0 +85°C 0.6 0 -40°C 0 (V) COM FIGURE 13. ON-RESISTANCE vs SWITCH VOLTAGE 10 ISL54059 T = +25°C, Unless Otherwise Specified A 1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0. 2.7V 0.50 0. 4.5V 0.40 0.35 0. FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE 1. 4.3V 1. 100mA COM 1.05 0.95 0.85 ...
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... FIGURE 17. TURN - ON TIME vs SUPPLY VOLTAGE 1. 50W 0VDC OFFSET IN RMS 0.1 1M 0.001 0.01 FREQUENCY (Hz) FIGURE 19. FREQUENCY RESPONSE 11 ISL54059 T = +25°C, Unless Otherwise Specified (Continued 5. 4. FIGURE 16. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE T = -40° +25° +85°C 4.5 5.5 -10 -20 -30 -40 -50 -60 ...
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... V = 0VDC BIAS R =32Ω 100 200 1k FREQUENCY (Hz) FIGURE 21. TOTAL HARMONIC DISTORTION vs FREQUENCY 12 ISL54059 T = +25°C, Unless Otherwise Specified (Continued) A Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND (DFN Paddle Connection: Tie to GND or Float) TRANSISTOR COUNT: 432 PROCESS: Submicron CMOS 2k 10k 20k FN6579.0 ...
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... INDEX AREA (DATUM N (Nd-1)Xe REF. BOTTOM VIEW C L (A1 SECTION "C-C" FOR ODD TERMINAL/SIDE 13 ISL54059 L10.3x3A 0. LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE 2X 0. SYMBOL 0. 0. NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 ISL54059 L10.1.8x1. ...