ISL62870 Intersil Corporation, ISL62870 Datasheet
ISL62870
Available stocks
Related parts for ISL62870
ISL62870 Summary of contents
Page 1
... Data Sheet PWM DC/DC Voltage Regulator Controller The ISL62870 Single-Phase Synchronous-Buck PWM voltage regulator featuring Intersil’s Robust Ripple 3 Regulator (R ) Technology™. The ISL62870 provides a low cost solution for compact high performance applications.The wide 3.3V to 25V input voltage range is ideal for systems that run on battery or AC adapter power sources ...
Page 2
... COMP RUN FAULT 100pF VSET − − OVP + FB FAULT − UVP VREF + 500mV FIGURE 1. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM OF ISL62870 100kΩ BOOT RUN PWM DRIVER UGATE PHASE SHOOT-THROUGH OTP PROTECTION PVCC PWM DRIVER LGATE RUN PGND VCC − ...
Page 3
... Application Schematics R VCC +5V C PVCC GND GPIO NC 3 SREF 4 VCC GPIO FIGURE 2. ISL62870 APPLICATION SCHEMATIC WITH DCR CURRENT SENSE R VCC +5V C PVCC GND GPIO NC 3 SREF 4 VCC GPIO FIGURE 3. ISL62870 APPLICATION SCHEMATIC WITH RESISTOR CURRENT SENSE 3 ISL62870 C VCC Q BOOT ...
Page 4
... VO Input Leakage Current ERROR AMPLIFIER FB Input Bias Current SREF SREF Voltage Soft-Start Current 4 ISL62870 Thermal Information Thermal Resistance (Typical, Note µTQFN Package . . . . . . . . . . . . . . . . . . . . . . Junction Temperature Range .-55°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150° -0. (DC) Pb-Free Reflow Profile .see link below -0. (< ...
Page 5
... OVP Rising Threshold Voltage OVP Falling Threshold Voltage OTP Rising Threshold Temperature (Note 2) OTP Hysteresis (Note 2) NOTE: 2. Limits established by characterization and are not production tested. 5 ISL62870 = -10°C to +100°C, unless otherwise stated. All typical specifications A SYMBOL TEST CONDITIONS R PGOOD = 5mA Sink ...
Page 6
... BOOT (Pin 12) Positive input supply for the UGATE high-side MOSFET gate driver. The BOOT pin is internally connected to the cathode 6 ISL62870 of the Schottky boot-strap diode. Connect an MLCC between the BOOT pin and the PHASE pin. VCC (Pin 13) Input for the IC bias voltage. Connect +5V to the VCC pin and decouple with at least a 1µ ...
Page 7
... V R OUT FB FB − + SREF FIGURE 4. ISL62870 VOLTAGE PROGRAMMING CIRCUIT Soft-Start Delay Circuit Description When the voltage on the VCC pin has ramped above the rising power-on reset voltage V VCC_THR the EN pin has increased above the rising enable threshold voltage , the SREF pin releases its discharge clamp, ...
Page 8
... V than 2µs. For example, if the converter is programmed to regulate 1.0V at the FB pin, that voltage would have to fall 8 ISL62870 below the typical V in order to trip the UVP fault latch. In numerical terms, that would be 84% x 1.0V = 0.84V. When a UVP fault is declared, form an R-C network the PGOOD pin will pull-down to 95Ω ...
Page 9
... DCM, reducing the light-load efficiency with unnecessary conduction loss as the low-side MOSFET sinks the inductor V and R, COMP, current. The ISL62870 controller avoids the DCM conduction COMP loss by making the low-side MOSFET emulate the current is the higher threshold blocking behavior of a diode. This smart-diode operation R ...
Page 10
... BOOT and PHASE pins. The capacitor is charged each time the phase node voltage falls a diode drop below PVCC, such as when the low-side MOSFET is turned on. 10 ISL62870 FIGURE 7. GATE DRIVER ADAPTIVE SHOOT-THROUGH Undefined Compensation Design 95Ω ...
Page 11
... Take into account that the rated value of a capacitor can fade as much as 50% as the DC voltage across it increases. 11 ISL62870 Selection of the Input Capacitor The important parameters for the bulk input capacitance are the voltage rating and the RMS current rating. For reliable ...
Page 12
... PWM signal the upper gate driver bias supply voltage the lower gate driver bias supply voltage L 12 ISL62870 - Q the gate of the MOSFET and discrete capacitors - Q (EQ. 20) the gate of the MOSFET and discrete capacitors - MOSFET Selection and Considerations Typically, a MOSFET cannot tolerate even brief excursions beyond their maximum drain to source voltage rating ...
Page 13
... The single connection point should also be where the VCC decoupling capacitor and the GND pin of the IC are connected. 13 ISL62870 Power Ground Anywhere not within the analog-ground island is Power Ground. VCC AND PVCC PINS Place the decoupling capacitors as close as practical to the IC ...
Page 14
... FIGURE 13. EFFICIENCY AT V 1.0 0.8 0.6 V 0.4 0.2 0.0 -0 -0.4 -0.6 -0.8 -1 (A) OUT FIGURE 15. SWITCHING FREQUENCY SREF VOUT FIGURE 17. START-UP INTO 750mV PRE-BIASED OUTPUT 12.6V 1.05V, LOAD = 10A IN OUT 14 ISL62870 -0.2 -0.4 -0.6 -0.8 -1 1.1V OUT = 12. 19V 1.1V FIGURE 16. START-UP, V OUT PGOOD FIGURE 18. SHUT-DOWN, V www.DataSheet4U.com 1.0 0.8 0.6 0 19V IN 0.2 0 ...
Page 15
... VOUT PHASE UGATE LGATE FIGURE 21. DCM STEADY-STATE OPERATION 12.6V 1.0V OUT 1ADC FIGURE 23. DCM LOAD TRANSIENT RESPONSE V 15 ISL62870 SREF VOUT = 1.05V, FIGURE 20. CCM STEADY-STATE OPERATION, OUT 5ADC FIGURE 22. CCM LOAD TRANSIENT RESPONSE = 3A OUT 11ADC IOUT +10A/µ -10A/µ ...
Page 16
... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 16 ISL62870 L16.2.6x1. ...