ISL6529 Intersil Corporation, ISL6529 Datasheet - Page 8
ISL6529
Manufacturer Part Number
ISL6529
Description
Dual Regulator.Synchronous Rectified Buck PWM and Linear Power Controller
Manufacturer
Intersil Corporation
Datasheet
1.ISL6529.pdf
(14 pages)
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To ensure the parallel combination of the feedback resistors
meets this criteria, choose a target value for R
5kΩ and then apply the following equations:
where V
and V
output voltage of 0.8V, simply populate R5 with a value less
than 5kΩ and do not populate R6.
Converter Shutdown
Pulling and holding the FB2 pin above a typical threshold of
1.28V will shutdown both regulators. Upon release of the
FB2 pin, the regulators enter into a soft-start cycle which
brings both outputs back into regulation.
PWM Controller Feedback Compensation
A simplified representation of the voltage-mode control loop
used for output regulation by the converter is shown in
Figure 6. The output voltage, V
negative input of the error amplifier which is regulated to the
reference voltage level, V
V
oscillator, V
signal from the PWM comparator. This signal is then used to
switch the MOSFET and produce a PWM waveform with an
amplitude of V
PHASE voltage is then smoothed by the output filter, L
and C
The modulator transfer function is defined as V
The internal PWM comparator and driver circuits equate to a
DC gain block dominated by the supply voltage, V
by the peak-to-peak magnitude of the triangle wave,
The output filter components, L
overall modulator small-signal transfer function by
contributing a double pole break frequency at F
zero at F
R5
R6
E/A
=
=
, is compared with the triangle wave produced by the
REF
OUT
V
------------------ -
----------------------------------------
V
V
OUT2
OUT2
OUT2
R5
REF
ESR
, to produce a DC voltage level.
is the internal reference voltage, 0.8V. For an
×
OSC
V
.
–
×
is the desired linear regulator output voltage
IN
REF
V
R
, to provide a pulse-width modulated (PWM)
REF
FB
at the PHASE node. The square-wave
REF
. The error amplifier output,
8
OUT
OUT
, is fed back to the
and C
OUT
FB
, shape the
OUT
LC
of less than
IN
and a
/V
, divided
∆
E/A
V
(EQ. 3)
(EQ. 4)
OUT
OSC
.
.
ISL6529
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
and the impedance networks Z
link between the modulator transfer function and a
controllable closed loop transfer function of V
goal of component selection for the compensation network is
to provide a loop gain with high 0dB crossing frequency
(f
difference between the closed loop phase at f
degrees.
F
F
0dB
LC
ESR
∆
FIGURE 6. VOLTAGE-MODE BUCK CONVERTER
V
=
) and adequate phase margin. Phase margin is the
OSC
=
--------------------------------------- -
2π
---------------------------------------- -
2π
OSC
×
×
V
E/A
L
ESR
1
O
COMPENSATION DESIGN
1
DETAILED COMPENSATION COMPONENTS
ISL6529
×
ERROR
AMP
C
×
COMP
PWM
O
Z
C
+
FB
COMP
-
+
O
C1
V
REF
C2
R2
-
+
DRIVER
0.8V
Z
IN
IN
and Z
FB
Z
FB
V
FB
IN
C3
(PARASITIC)
PHASE
. They provide the
Z
R1
IN
L
OUT
0dB
OUT
R3
ESR
C
V
/V
O
and 180
OUT
+
REF
(EQ. 5)
(EQ. 6)
V
OUT
. The