ISL6569 Intersil Corporation, ISL6569 Datasheet - Page 15

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ISL6569

Manufacturer Part Number
ISL6569
Description
Multi-Phase PWM Controller
Manufacturer
Intersil Corporation
Datasheet

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First, all PWM outputs are commanded low. Directing the
Intersil drivers to turn on the lower MOSFETs; shunting the
output to ground preventing any further increase in output
voltage. The PWM outputs remain low until VDIFF falls to
the programmed DAC level at which time they go into a high-
impedance state. The Intersil drivers respond by turning off
both upper and lower MOSFETs. If the over-voltage
condition reoccurs, the ISL6569 will again command the
lower MOSFETs to turn on. The ISL6569 will continue to
protect the load in this fashion as long as the over-voltage
repeats.
Second, the OVP pin pulls to VCC and can deliver 100mA
into the gate of either a MOSFET or SCR placed on the input
rail (V
collapses the power rail and causes a fuse placed further up
stream to blow. The fuse must be sized such that the
MOSFET or SCR will not overheat before the fuse blows.
Once an over-voltage condition is detected, normal PWM
operation ceases and PGOOD remains low until the
ISL6569 is reset. Cycling the voltage on EN below 1.23V or
the bias to VCC below the POR-falling threshold will reset
the controller.
Over-Current Protection
The ISL6569 takes advantage of the proportionality between
the load current and the average current, I
over-current condition. See the Channel-Current Balance
section for more detail on how the average current is
created. The average current is continually compared with a
constant 90µA reference current. Once the average current
exceeds the reference current, the comparator triggers the
converter to shutdown. The POR circuit places all PWM
signals in a high-impedance state which commands the
drivers to turn off both upper and lower MOSFETs. PGOOD
pulls low and the system remains in this state while the
controller counts 2048 phase clock cycles. This is followed
by a soft-start attempt (see Soft-Start).
During the soft-start interval, the over-current protection
circuitry remains active. As the output voltage ramps up, if
an over-current condition is detected, the ISL6569
immediately places all PWM signals in a high-impedance
state. The ISL6569 repeats the 2048-cycle wait period and
follows with another soft-start attempt, as shown in
Figure 12. This hiccup mode of operation repeats up to
seven times. On the eighth soft-start attempt, the part
latches off. Once latched off, the ISL6559 can only be reset
when the voltage on EN is brought below 1.23V or VCC is
brought below the POR falling threshold.
IN
) or V
OUT
. Turning on the MOSFET or SCR
15
AVG
, to detect an
ISL6569
Upon completion of a successful soft-start attempt,
operation will continue as normal, PGOOD will return high,
and the over-current latch counter will reset.
During VID-on-the-fly transitions, the OC comparator output
is blanked. The quality and mix of output capacitors used in
different applications leads to a wide output capacitance
range. Depending upon the magnitude and direction of the
VID change, the change in voltage across the output
capacitors could result in significant current flow. Summing
this instantaneous current with the load current already
present could drive the average current above the reference
current level and cause an OC trip during the transition. By
blanking the OC comparator during the VID-on-the-fly
transition, nuisance tripping is avoided.
General Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to create a multi-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced below. In
addition to this guide, Intersil provides complete reference
designs that include schematics, bills of materials, and
example board layouts for all common microprocessor
applications.
Power Stages
Principally, the designer will be concerned with whether
components can be mounted on both sides of the circuit
board; whether through-hole components are permitted; and
the total board space available for power-supply circuitry.
Generally speaking, the most economical solutions are
those where each phase handles between 15 and 20A. All
surface-mount designs will tend toward the lower end of this
current range and, if through-hole MOSFETs can be used,
higher per-phase currents are possible. In cases where
board space is the limiting constraint, current can be pushed
as high as 30A per phase, but these designs require heat
sinks and forced air to cool the MOSFETs.
FIGURE 12. OVERCURRENT BEHAVIOR IN HICCUP MODE
0A
0V
5ms/DIV
OUTPUT CURRENT, 20A/DIV
OUTPUT VOLTAGE,
500mV/DIV

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