ISL8102 Intersil Corporation, ISL8102 Datasheet - Page 11

• Manufacturer Part Number: ISL8102
• Description: Two-Phase Buck PWM Controller
• Manufacturer: Intersil Corporation

transition low. During this time the current sense amplifier
uses the ISEN inputs to reproduce a signal proportional to
the inductor current, I
a scaled version of the inductor current. The sample window
opens exactly 1/6 of the switching period, t
PWM transitions low. The sample window then stays open
the rest of the switching cycle until PWM transitions high
again, as illustrated in Figure 4.
The sampled current, at the end of the t
proportional to the inductor current and is held until the next
switching period sample. The sampled current is used only
for channel current balance.
The ISL8102 supports MOSFET r
sample each channel’s current for channel current balance.
The internal circuitry, shown in Figure 5 represents channel
n of an N-channel converter. This circuitry is repeated for
each channel in the converter, but may not be active
depending on the status of the 2PH pin, as described in the
PWM Operation section.
SAMPLE
ISL8102 INTERNAL CIRCUIT
HOLD
FIGURE 5. ISL8102 INTERNAL AND EXTERNAL CURRENT-
I
&
n
I SEN
FIGURE 4. SAMPLE AND HOLD TIMING
=
SENSING CIRCUITRY FOR CURRENT BALANCE
OLD SAMPLE
CURRENT
I L
x
r DS ON
------------------------- -
+
-
R
PWM
ISEN
L
(
. This sensed current, I
)
SWITCHING PERIOD
SAMPLING PERIOD
11
I
L
CHANNEL N
LOWER MOSFET
ISEN(n)
EXTERNAL CIRCUIT
TIME
R
ISEN
DS(ON)
I
SEN
SAMPLE
current sensing to
V
SW
IN
SEN
+
, after the
NEW SAMPLE
CURRENT
CHANNEL N
UPPER MOSFET
-
I L
, is
x
r DS ON
, is simply
I
L
(
)
ISL8102
The ISL8102 senses the channel load current by sampling
the voltage across the lower MOSFET r
Figure 5. A ground-referenced operational amplifier, internal
to the ISL8102, is connected to the PHASE node through a
resistor, R
the voltage drop across the r
while it is conducting. The resulting current into the ISEN pin
is proportional to the channel current, I
sampled and held as described in the Current Sampling
section. From Figure 5, the following equation for I
derived where I
Output Voltage Setting
The ISL8102 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the REF0 and REF1 pins. The DAC decodes the 2-bit logic
signals into one of the discrete voltages shown in Table 1.
Each REF0 and REF1 pins are pulled up to an internal 1.2V
voltage by weak current sources (40µA current, decreasing
to 0 as the voltage at the REF0, REF1 pins varies from 0 to
the internal 1.2V pull-up voltage). External pull-up resistors
or active-high output stages can augment the pull-up current
sources, up to a voltage of 5V. The DAC pin must be
connected to REF pin through a 1-5kΩ resistor and a filter
capacitor (0.022µF) is connected between REF and GND.
The ISL8102 accommodates the use of external voltage
reference connected to REF pin if a different output voltage
is required. The DAC voltage must be set at least as high as
external reference. The error amp internal noninverting input
is the lower of REF or (DAC +300mV).
A third method for setting the output voltage is to use a
resistor divider (R
to VSEN pin to set the output voltage level as shown in
Figure 6. This method is good for generating voltages up to
2.3V (with the REF voltage set to 1.5V).
For this case, the output voltage can be obtained as follows:
It is recommended to choose resistor values of less than
500Ω for R
voltage DC accuracy.
I
V
n
OUT
=
TABLE 1. ISL8102 DAC VOLTAGE SELECTION TABLE
I
L
=
⋅
REF1
r
----------------------
V
0
0
1
1
DS ON
R
ISEN
REF
S1
ISEN
(
and R
⋅
. The voltage across R
L
(
--------------------------------- -
)
R
is the channel current.
P1
S1
R
, R
P1
+
P1
R
S1
resistors in order to get better output
P1
) from the output terminal (V
)
+ −
REF0
DS(ON)
V
0
1
0
1
OFS
–
of the lower MOSFET
V
ISEN
DROOP
L
. The ISEN current is
DS(ON)
is equivalent to
, as shown in
0.600V
0.900V
1.200V
1.500V
DAC
October 19, 2005
n
is
FN9247.0
OUT
(EQ. 3)
(EQ. 4)
)