ISL8724 Intersil Corporation, ISL8724 Datasheet - Page 2

• Manufacturer Part Number: ISL8724
• Description: (ISL8723 / ISL8724) Power Sequencing Controllers
• Manufacturer: Intersil Corporation

Pin Descriptions
PIN
23
10
24
20
12
17
14
21
16
15
18
13
#
1
8
3
4
2
5
6
7
FIGURE 1. TYPICAL ISL8723 APPLICATION USAGE
DLY_OFF_C
DLY_OFF_D
DLY_OFF_A Gate Off Delay
DLY_OFF_B
DLY_ON_A
DLY_ON_B
DLY_ON_C
DLY_ON_D
PIN NAME
ENABLE#
ENABLE/
RESET#
UVLO_A
UVLO_B
UVLO_C
UVLO_D
GATE_C
GATE_D
DIN
GATE_A
GATE_B
GND
VDD
CIN
VDD
ENABLE
SYSRST#
RESET#
GROUND
Chip Bias
Bias Return
Input to start on/off
sequencing.
RESET# Output
Under Voltage Lock
Out/Monitoring
Input
Gate On Delay
Timer Output
Timer Output
FET Gate Drive
Output
BIN
FUNCTION
AIN
2
UVLO_A
UVLO_B
UVLO_C
UVLO_D
Bias IC from nominal 2.5V to 5V
IC ground
Input to initiate the start of the programmed sequencing of supplies on or off. Enable functionality is
disabled for 10ms after UVLO is satisfied. ISL8723 has ENABLE. ISL8724 has ENABLE#.
RESET# provides a high signal ~160ms after all GATEs are fully enhanced. This delay is for stabilization
of output voltages. RESET# will assert low upon any UVLO not being satisfied or ENABLE/ENABLE#
being deasserted. The RESET# output is an open drain N-channel FET and is guaranteed to be in the
correct state for VDD down to 1V and is filtered to ignore fast transients on VDD and UVLO_X.
These inputs provide for a programmable UV lockout referenced to an internal 0.631V reference and
are filtered to ignore short (<7µs) transients below programmed UVLO level.
Allows for programming the delay and sequence for V
cap is charged with 1µA, 10ms after turn-on initiated by ENABLE/ENABLE# with an internal current
source providing delayed enhancement of the associated FETs GATE to turn-on.
Allows for programming the delay and sequence for V
capacitor to ground. Each cap is charged with a 1µA internal current source to an internal reference
voltage causing the corresponding gate to be pulled down thus turning-off the FET.
Drives the external FETs with a 10µA current source to soft start ramp into the load. During sequence
off, 10µA is sunk from this pin to control the FET turn-off. During a turn-off due to a fault, the gate will
sink ~75mA to ensure a rapid turn-off.
AOUT
BOUT
COUT
DOUT
ISL8723, ISL8724
DESCRIPTION
OUT
OUT
turn-on using a capacitor to ground. Each
turn-off through ENABLE/ENABLE# via a
December 21, 2006
FN6413.0