ISL90726 Intersil Corporation, ISL90726 Datasheet - Page 5

• Manufacturer Part Number: ISL90726
• Description: Digitally Controlled Potentiometer
• Manufacturer: Intersil Corporation

SDA vs SCL Timing
NOTES:
Principles of Operation
The ISL90726 is an integrated circuit incorporating one DCP
with its associated registers and an I
providing direct communication between a host and the
potentiometer.
DCP Description
The DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of the
DCP are equivalent to the fixed terminals of a mechanical
potentiometer (R
connected to intermediate nodes, and is equivalent to the
wiper terminal of a mechanical potentiometer. The position
of the wiper terminal within the DCP is controlled by an 7-bit
volatile Wiper Register (WR). The DCP has its own WR.
When the WR of the DCP contains all zeroes (WR<6:0>=
00h), its wiper terminal (R
(R
(WR<6:0>=7Fh), its wiper terminal (R
“High” terminal (R
all zeroes (00h) to all ones (127 decimal), the wiper moves
monotonically from the position closest to R
closest to R
10. This parameter is not 100% tested.
12. These are I
11. V
1. Typical values are for T
2. LSB: [V(R
3. ZS error = V(R
4. FS error = [V(R
5. MI =
6. Roffset = R
7. RDNL = (R
8. RINL = [R
9.
L
(OUTPUT TIMING)
). When the WR of the DCP contains all ones
(INPUT TIMING)
incremental voltage when changing from one tap to an adjacent tap.
Roffset = R
TC
IL
R
= 0V, V
|
R
=
127
--------------------------------------------------------------- -
[
H
Max Ri
W
i
[
SDA
SCL
. R
– (MI • i) – R
Max Ri
IH
i
0
127
2
– R
SDA
)
– R
/
C-specific parameters and are not directly tested. However, they are used in the device testing to validate specifications.
127
MI, when measuring between R
= V
H
(
H
t
W
/
0
MI, when measuring between R
SU:STA
W
i-1
(
H
|
is not connected to a device pin. The net
– V(R
)
/
and R
)
CC.
0
127. R
). As the value of the WR increases from
)
)
127
/
/
LSB.
+
) Min Ri
MI, for i = 32 to 127.
–
Min Ri
– V
W
A
0
L
127
)
W
]
(
0
= 25°C and 3.3V supply voltage.
CC
/
pins). The R
MI, for i = 32 to 127.
]
(
/
) is closest to its “Low” terminal
127. V(R
and R
]
)
t
/
HD:STA
] 2 ⁄
5
LSB.
)
]
×
0
---------------- -
125°C
are the measured resistances for the DCP register set to FF hex and 00 hex respectively.
W
10
2
C serial interface
W
)
t
127
F
6
W
) is closest to its
t
SU:DAT
pin of the DCP is
and V(R
for i = 32 to 127, T = -40°C to 85°C. Max( ) is the maximum value of the resistance and Min ( ) is the
minimum value of the resistance over the temperature range.
W
L
to the position
W
and R
and R
W
)
L
0
t
.
HIGH
are V(R
H
.
ISL90726
W
) for the DCP register set to FF hex and 00 hex respectively. LSB is the
t
LOW
t
HD:DAT
effect is the resistance between R
monotonically.
While the ISL90726 is being powered up, the WR is reset to
20h (64 decimal), which locates R
between R
The WR and IVR can be read or written directly using the
I
I
The ISL90726 supports bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
bus as a transmitter and the receiving device as the receiver.
The device controlling the transfer is a master and the
device being controlled is the slave. The master always
initiates data transfers and provides the clock for both
transmit and receive operations. Therefore, the ISL90726
operates as slave device in all applications.
All communication over the I
sending the MSB of each byte of data first.
2
2
C serial interface as described in the following sections.
C Serial Interface
t
R
L
and R
t
AA
H
.
t
DH
2
C interface is conducted by
W
W
t
BUF
and R
roughly at the center
t
SU:STO
L
increases
August 3, 2005
FN8244.1