ISL97645 Intersil Corporation, ISL97645 Datasheet
ISL97645
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ISL97645 Summary of contents
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... Pb-Free Plus Anneal Available (RoHS Compliant) Applications • LCD Monitors (15”+) • Notebook Display (up to 16”) Ordering Information PART NUMBER (Note) ISL97645IRZ 19 ISL97645IRZ-T 97645IRZ - 4x4 QFN VIN ISL97645IRZ-TK 97645IRZ - 4x4 QFN FREQ 16 NOTE: Intersil Pb-free plus anneal products employ special Pb-free ...
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... VIN ENABLE PGND VGH 2 ISL97645 Ground Gate Pulse Modulation Output Gate Pulse Modulation Control Input Gate Pulse Modulation Enable Gate Pulse Modulation Lower Voltage Input V Amplifier Supply COM V Amplifier Output COM V Amplifier Inverting Input COM V Amplifier Noninverting Input ...
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... ACC Overall Accuracy (Line, Load, AVDD Temperature) V Feedback Voltage ( ISL97645 Thermal Information Thermal Resistance 4x4 QFN Package (Notes Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum Continuous Junction Temperature . . . . . . . . . . . . 125°C Power Dissipation ≤ 25° .2.44W T ...
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... VGH to VGH_M On Resistance ONVGH I VGH_M Discharge Current (Note 33kΩ DIS_VGH T DELAY Time (Note 2) DEL NOTES: 1. Nominal discharge current = 300/(RE+5kΩ). 2. Nominal delay time = 4000*CE. 4 ISL97645 TEST CONDITION FREQ = 0V FREQ = V IN2 SS < 1V 25°C A Iout(source) = 5mA Iout(source) = 50mA Iout(sink) = 5mA Iout(sink) = 50mA ...
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... EFFICIENCY vs IA VDD 10.5 10.45 A 150mA VDD 10.4 10.35 10.3 10.25 10.2 10.15 3 3.5 4.0 4.5 V (V) IN FIGURE 3. LINE REGULATION 1pF 100k VGH_M VFLK FIGURE 5. GPM CIRCUIT WAVEFORM 5 ISL97645 = 650kHz OSC = 1.2MHz 800 1000 1200 VDD L = 10µ 500mA VDD 5.0 5.5 6 FIGURE 4. BOOST CONVERTER TRANSIENT RESPONSE VDD IN 0 -0.1 -0.2 -0 650kHz OSC -0 ...
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... Typical Performance Curves CE = 10pF 100k VGH_M VFLK FIGURE 7. GPM CIRCUIT WAVEFORM INPUT SIGNAL OUTPUT SIGNAL FIGURE 9. V RISING SLEW RATE COM 6 ISL97645 (Continued) INPUT SIGNAL FIGURE 10 10pF 150k VGH_M VFLK FIGURE 8. GPM CIRCUIT WAVEFORM OUTPUT SIGNAL (-3dB ATTENTUATION FROM INPUT SIGNAL) ...
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... OSCILLATION GENERATOR SLOPE COMPENSATION COMP REFERENCE GENERATOR FAULT CONTROL ENABLE OUT VFLK VGH 7 ISL97645 SUMMING AMPLIFIER START-UP AND + - GPM CIRCUIT VGH_M CE RE FIGURE 11. ISL97645 BLOCK DIAGRAM LX PWM LOGIC 2.5µ PGND SS VIN VDPM NC NC VDD2 POS NEG GND VDD1 FN9263.0 April 11, 2006 ...
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... This part also integrates Gate Pulse Modulator circuit that can help to optimize the picture quality. Enable Control When enable pin is pulling down, the ISL97645 is shut down reducing the supply current to <10µA. When the voltage at enable pin reaches 2.2V, the ISL97645 is on. ...
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... ISL97645 This restricts the maximum output current (average) based on the following equation: I OMAX Where ∆I by: ∆ where f The Table 2 gives typical values (margins are considered 10%, 3%, 20%, 10% and 15 Capacitor An input capacitor is used to suppress the voltage ripple injected into the boost converter. The ceramic capacitor with capacitance larger than 10µ ...
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... CDR8D43-100NC Compensation CD1-5R2 The boost converter of ISL97645 can be compensated network connected from CM1 pin to ground. 4.7nF and 10k RC network is used in the demo board. The larger value resistor and lower value capacitor can lower the transient overshoot, however, at the expense of stability of the loop. ...
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... Figure 14. VGH_M FIGURE 14. GATE PULSE MODULATOR CIRCUIT BLOCK DIAGRAM 11 ISL97645 When VDPM is LOW, the block is disabled and VGHM is grounded. When VDPM is HIGH, the output is determined by VFLK. When VFLK goes high, VGHM is pulled to VGH by a 70Ω switch. When VFLK goes low, there is a delay controlled by capacitor CE, following which VGHM is driven to VDD1, with a slew rate controlled by resistor RE ...
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... V have settled again before the next line is processed. Fault Protection ISL97645 provides the overall fault protections including over current protection and over-temperature protection. VGH_M An internal temperature sensor continuously monitors the die temperature ...
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... Minimize feedback input track lengths to avoid switching noise pick-up. A demo board is available to illustrate the proper layout implementation. 13 ISL97645 FN9263.0 April 11, 2006 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 ISL97645 L24.4x4D 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE 0.15 ...