74F11 Fairchild Semiconductor, 74F11 Datasheet

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74F11

Manufacturer Part Number
74F11
Description
Triple 3-Input AND Gate
Manufacturer
Fairchild Semiconductor
Datasheet

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© 1999 Fairchild Semiconductor Corporation
74F11SC
74F11SJ
74F11PC
74F11
Triple 3-Input AND Gate
General Description
This device contains three independent gates, each of
which performs the logic AND function.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Unit Loading/Fan Out
Order Number
Package Number
IEEE/IEC
M14D
M14A
N14A
A
O
Pin Names
n
n
, B
n
, C
n
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Outputs
Description
DS009459
Connection Diagram
HIGH/LOW
50/33.3
1.0/1.0
U.L.
Package Description
Output I
20 A/ 0.6 mA
Input I
1 mA/20 mA
IH
OH
/I
/I
IL
OL
April 1988
Revised July 1999
www.fairchildsemi.com

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74F11 Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F11SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F11PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 3

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14A Package Number M14D 3 www.fairchildsemi.com ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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