74F280SC Fairchild Semiconductor, 74F280SC Datasheet
74F280SC
Specifications of 74F280SC
Related parts for 74F280SC
74F280SC Summary of contents
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... HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even out- put. Ordering Code: Order Number Package Number 74F280SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ...
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Unit Loading/Fan Out Pin Names I –I Data Inputs 0 8 Odd Parity Output O Even Parity Output E Truth Table Number of HIGH Inputs I – HIGH ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 2) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...
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Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow www.fairchildsemi.com Package Number M14A 4 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...